Chapter 1. Device hardware properties

VideoServer

Device Revision: 0 .2

The generic video server. This implements the base properties inherited by all camera types based on the Linux videoserver. Direct access to sensor properties should be only allowed during the prototyping phase.

Properties

Table 1.1. Camera User level

Property	Type	Flags	Description
Client	STRING	RW	The identifier of the video client, normally an IP address or local host name. Does not need to be set if no raw streaming is used.
Enable	BOOL	RW	Enable (1) and disable (0) video stream
Mode	MODE	RW	The video mode. Should contain only raw display modes.
PPMode	MODE	RW	Preprocessing modes. These are generic/experimental preprocessing modes that may be part of the VisionKit.
Timeout	INT	RW	Timeout in ms for video acquisition. Make sure this is above inverse frame rate.
InputBits	MODE	RW	Input bits per pixel. This is the bit depth read from the video interface. The output bit depth is configured using the 'Mode' property. property.
Encoder	MODE	RW	Encode mode
StreamingDestination	STRING	RW	The streaming URL or IP for MPEG encoder or RTP streaming modes
JpegHdr	BUFFER	RO	For JPEG hardware encoder based cameras, the JPEG header can be read out ad-hoc.
Shutdown	INT	RW	Shutdown flag. Only for prototyping.
MasterClock	FLOAT	RO	The master clock the sensor is running on.
Size	STRUCT	RW	The video grabber window dimensions. These must match the sensor video output dimensions.
Histogram	STRUCT	RW
Frame	STRUCT	RW
FIFO	STRUCT	RW	Video FIFO (USERPTR mode only). Acquired frames are typically put into a FIFO where they can be processed further. The FIFO pipeline has several stages for optimum thread based frame processing.

Table 1.2. v4l config

Property	Type	Flags	Description
DeviceIndex	INT	RW	v4l2 device index. For cameras with more than one sensor interface.
GrabMode	MODE	RW	Frame acquisition mode.
Delay	INT	RW	Horizontal delay for some sensors, typically 0
Trigger	COMMAND	WO	Trigger one frame when in SNAPSHOT acquisition mode (GrabMode)
BufferQueue	STRUCT	RW	Buffer queue configuration

Visionkit base class

Device Revision: 0 .0develop

The camera family base class. Implement all extended but common to all sensor functionality here.

Properties

Table 1.3. ChipVersion

Property	Type	Flags	Description
ChipVersion	INT	RO	Chip version ID property for debugging
ChipRev	INT	RO	Chip revision ID. Directly ready out the ChipRev register.
ChipProbe	INT	RW

Low level address map

Minimum register map

Registermap common to (almost) all chips of this family. This is a base functionality needed to determine the chip type.

Table 1.4. Address map Minimum register map starting at absolute address

Offset [Span]	Name(Id)	Access	Description
`0x00 [2]`	ChipVersion	RW	Chip id code or version
`0x00f9 [2]`	ChipProbe	RO
`0x00fd [2]`	ChipRev	RO	Chip revision register. Not for all Aptina sensors.
`0x00ff [2]`	ChipVersionReg2	RO	Mirror Reg 0x00

Detailed register description

CameraMT9P031

Device Revision: 0 .1

This sensor has chip id 0x1801

Properties

Table 1.5. Sensor

Property	Type	Flags	Description
Reset	INT	RW
Snapshot	BOOL	RW	If enabled, run in Snapshot mode
TriggerInvert	BOOL	RW	Inverts the trigger pin level
GlobalReset	BOOL	RW	Enable Global Reset Release mode
ShutterWidthL	INT	RW	Shutter width Low word (exposure cycles)
ShutterWidthH	INT	RW	Shutter width high word (exposure cycles)
Trigger	BOOL	RW	Setting this bit fires a software trigger. The bit must be cleared by software again.
PixelClock	STRUCT	RW	Pixelclock scaling and inversion
Slew	STRUCT	RW	Output pin Slew rate factors
TestPattern	STRUCT	RW	Sensor test pattern properties
Window	STRUCT	RW	The image window (Region of interest)
Bin	STRUCT	RW	Binning values for X and Y. See register description.
Skip	STRUCT	RW	Skip values in X and Y. See register description.
DigitalGain	STRUCT	RW	Digital gain factors
AnalogGain	STRUCT	RW	Analog gain values

Low level address map

mt9p031

Table 1.6. Address map mt9p031 starting at absolute address

Offset [Span]	Name(Id)	Access
`0x001 [2]`	RowStart	RW
`0x002 [2]`	ColStart	RW
`0x003 [2]`	RowSize	RW
`0x004 [2]`	ColSize	RW
`0x005 [2]`	HBlank	RW
`0x006 [2]`	VBlank	RW
`0x007 [2]`	OutputControl	RW
`0x008 [2]`	ShutterWidthUpper	RW
`0x009 [2]`	ShutterWidthLower	RW
`0x00a [2]`	PixelClockControl	RW
`0x00b [2]`	Restart	RW
`0x00d [2]`	mt9p031_Reset	RW
`0x010 [2]`	PLLControl	RW
`0x011 [2]`	PLLConfig1	RW
`0x012 [2]`	PLLConfig2	RW
`0x01e [2]`	ReadMode1	RW
`0x020 [2]`	ReadMode2	RW
`0x22 [2]`	RowAddrMode	RW
`0x23 [2]`	ColAddrMode	RW
`0x2b [2]`	GainGreen1	RW
`0x2c [2]`	GainBlue	RW
`0x2d [2]`	GainRed	RW
`0x2e [2]`	GainGreen2	RW
`0x35 [2]`	GainGlobal	WO
`0x49 [2]`	RowBlackTarget	RW
`0x4b [2]`	RowBlackOffset	RW
`0xa0 [2]`	TestPatternCtrl	RW
`0xa1 [2]`	TestPatternGreen	RW
`0xa2 [2]`	TestPatternRed	RW
`0xa3 [2]`	TestPatternBlue	RW

Detailed register description

Table 1.7. OutputControl (Address: 0x007)

Bit(s)	Name	Description
10:12	`OUT_SLEW`
7:9	`PIXCLK_SLEW`
2:2	`USE_FIFO`
1:1	`CHIP_ENABLE`
0:0	`SYNC_CHANGES`

Table 1.8. PixelClockControl (Address: 0x00a)

Bit(s)	Name	Description
15:15	`INVERT`
8:10	`SHIFT`
0:6	`DIVIDER`

Table 1.9. Restart (Address: 0x00b)

Bit(s)	Name	Description
2:2	`TRIGGER`
1:1	`PAUSE`
0:0	`RESTART`

Table 1.10. ReadMode1 (Address: 0x01e)

Bit(s)	Name	Description
11:11	`LVAL_XOR`
10:10	`LVAL_CONT`
9:9	`TRIGGER_INVERT`
8:8	`SNAPSHOT`
7:7	`GLOBAL_RESET`
6:6	`BULB_EXP`
5:5	`STROBE_INVERT`
4:4	`STROBE_ENABLE`
2:3	`STROBE_START`
0:1	`STROBE_END`

Table 1.11. RowAddrMode (Address: 0x22)

Bit(s)	Name	Description
4:5	`BIN`
0:2	`SKIP`

Table 1.12. ColAddrMode (Address: 0x23)

Bit(s)	Name	Description
4:5	`BIN`
0:2	`SKIP`

Table 1.13. GainGreen1 (Address: 0x2b)

Bit(s)	Name	Description
8:14	`DIGITAL`
6:6	`ANALOG_MUL`
5:0	`ANALOG`

Table 1.14. GainBlue (Address: 0x2c)

Bit(s)	Name	Description
8:14	`DIGITAL`
6:6	`ANALOG_MUL`
5:0	`ANALOG`

Table 1.15. GainRed (Address: 0x2d)

Bit(s)	Name	Description
8:14	`DIGITAL`
6:6	`ANALOG_MUL`
5:0	`ANALOG`

Table 1.16. GainGreen2 (Address: 0x2e)

Bit(s)	Name	Description
8:14	`DIGITAL`
6:6	`ANALOG_MUL`
5:0	`ANALOG`

Table 1.17. TestPatternCtrl (Address: 0xa0)

Bit(s)	Name	Description
3:6	`MODE`
0:0	`ENABLE`

CameraMT9V032

Device Revision: 0 .0

Note: We use the MT9V024 register definitions, the MT9V032 is a subset.

Properties

Table 1.18. Sensor

Property	Type	Flags	Description
ShutterWidth	INT	RW	Shutterwidth only relevant when AEC disabled. Unit: Row time
Width	INT	RW
Height	INT	RW
HBlank	INT	RW
VBlank	INT	RW
AutoGain	STRUCT	RW
AutoExposure	STRUCT	RW

Table 1.19. Testing

Property	Type	Flags	Description
Reset	BOOL	RW
AutoReset	BOOL	RW	Reset Auto Gain and Exposure circuits only
RowNoiseCorr	BOOL	RW
AnalogGain	INT	RW
ADCMode	MODE	RW
Color	BOOL	RW
ScanMode	INT	RW
OperatingMode	MODE	RW
Simultaneous	BOOL	RW
ColumnStart	INT	RW
RowStart	INT	RW
Binning	STRUCT	RW
Flip	STRUCT	RW
ShowDark	STRUCT	RW
HDR	STRUCT	RW
TestPattern	STRUCT	RW
HDRVoltages	ARRAY	RW
TileCoordinateX	ARRAY	RW
TileCoordinateY	ARRAY	RW

Low level address map

mt9v032

This is really the MT9V024 register map

Table 1.20. Address map mt9v032 starting at absolute address 0x0000

Offset [Span]	Name(Id)	Access	Description
`0x01 [2]`	ColumnStart	RW
`0x02 [2]`	ContextA_RowStart	RW
`0x03 [2]`	ContextA_Height	RW
`0x04 [2]`	ContextA_Width	RW
`0x05 [2]`	ContextA_HBlank	RW
`0x06 [2]`	ContextA_VBlank	RW
`0x07 [2]`	ChipControl	RW
`0x08 [2]`	ContextA_ShutterWidth1	RW
`0x09 [2]`	ContextA_ShutterWidth2	RW
`0x0a [2]`	ContextA_ShutterWidthCtrl	RW
`0x0b [2]`	ContextA_TotalShutterWidth	RW
`0x0c [2]`	ResetCtrl	RW
`0x0d [2]`	ContextA_ReadMode	RW
`0x0f [2]`	SensorTypeCtrl	RW
`0x1b [2]`	LED_OUT_Ctrl	RW
`0x1c [2]`	ADCCompMode	RW
`0x2c [2]`	VrefADCControl	RW
`0x31 [1]`	Array_ContextA_Voltages	RW	Array base register. This is a shadow of ContextA_V1, but with specified size 1 to correctly calculate the address field.
`0x31 [2]`	ContextA_V1	RW
`0x32 [2]`	ContextA_V2	RW
`0x33 [2]`	ContextA_V3	RW
`0x34 [2]`	ContextA_V4	RW
`0x35 [2]`	ContextA_AnalogGain	RW
`0x42 [2]`	FrameDarkAverage	RW
`0x46 [2]`	DarkAvgThresholds	RW
`0x47 [2]`	BlackLevelCalibCtrl	RW
`0x48 [2]`	BlackLevelCalibVal	RW
`0x4c [2]`	BlackLevelCalibStep	RW
`0x70 [2]`	RowNoiseCorrCtrl	RW
`0x71 [2]`	RowNoiseConst	RW
`0x72 [2]`	VideoOutCtrl	RW
`0x7f [2]`	DigitalTestPattern	RW
`0x80 [2]`	Gain_X0_Y0	RW
`0x85 [2]`	Gain_X0_Y1	RW
`0x8a [2]`	Gain_X0_Y2	RW
`0x8f [2]`	Gain_X0_Y3	RW
`0x94 [2]`	Gain_X0_Y4	RW
`0x99 [1]`	CoordX0_base	RW
`0x99 [2]`	CoordX0	RW
`0x9f [1]`	CoordY0_base	RW
`0x9f [2]`	CoordY0	RW
`0xa5 [2]`	AEC_AGC_Bin	RW
`0xa6 [2]`	AEC_UpdateFreq	RW
`0xaa [2]`	AGC_LPF	RW
`0xab [2]`	MaxAnalogGain	RW
`0xac [2]`	AEC_MinExp	RW
`0xad [2]`	AEC_MaxExp	RW
`0xae [2]`	BinDiffThresh	RW
`0xaf [2]`	AEC_AGC_EnableAB	RW
`0xb0 [2]`	AEC_AGC_PixCount	RW
`0xb1 [2]`	LVDS_MasterCtrl	RW
`0xb2 [2]`	LVDS_ShiftClkCtrl	RW
`0xb3 [2]`	LVDS_DataCtrl	RW
`0xb4 [2]`	DataStreamLatency	RW
`0xb5 [2]`	LVDS_IntSync	RW
`0xb6 [2]`	LVDS_PayloadCtrl	RW
`0xba [2]`	AGCGainOut	RW
`0xbb [2]`	AECExposureOut	RW
`0xbc [2]`	AGCAEC_CurrentBin	RW
`0xbd [2]`	MaxShutterWidth	RW
`0xbe [2]`	AGCAEC_BinDiffTresh	RW
`0xbf [2]`	InterlaceFieldBlank	RW
`0xc0 [2]`	MonModeCaptureCtrl	RW
`0xc1 [2]`	Temperature	RW
`0xc2 [2]`	AnalogControls	RW
`0xc3 [2]`	NTSC_FV_LV	RW
`0xc4 [2]`	NTSC_HBlank	RW
`0xc5 [2]`	NTSC_VBlank	RW
`0xf0 [2]`	BytewiseAddr_v024	RW
`0xfe [2]`	RegisterLock	RW
`0xff [2]`	ChipVersionAlt	RW

Detailed register description

Table 1.21. ChipControl (Address: 0x07)

Bit(s)	Name	Description
15:15	`CONTEXT_SEL`
9:9	`PIXEL_CORR`
8:8	`SIM_SEQ_MODE`
7:7	`OUT_ENABLE`
6:6	`STEREO_SLAVE`
5:5	`STEREO`
3:4	`OPERMODE`
0:2	`SCANMODE`

Table 1.22. ContextA_ShutterWidthCtrl (Address: 0x0a)

Bit(s)	Name	Description
9:9	`SINGLE_KNEE`
8:8	`AUTOADJUST`
4:7	`T3RATIO`
0:3	`T2RATIO`

Table 1.23. ResetCtrl (Address: 0x0c)

Bit(s)	Name	Description
1:1	`AUTO_BLOCK_RESET`
0:0	`SOFT_RESET`

Table 1.24. ContextA_ReadMode (Address: 0x0d)

Bit(s)	Name	Description
7:7	`SHOW_DARK_COLS`
6:6	`SHOW_DARK_ROWS`
5:5	`FLIP_COL`
4:4	`FLIP_ROW`
2:3	`BIN_COL`
0:1	`BIN_ROW`

Table 1.25. SensorTypeCtrl (Address: 0x0f)

Bit(s)	Name	Description
6:6	`HDR`
2:2	`COLORMODE`

Table 1.26. ADCCompMode (Address: 0x1c)

Bit(s)	Name	Description
8:9	`CONTEXTB_MODE`
0:1	`CONTEXTA_MODE`

Table 1.27. RowNoiseCorrCtrl (Address: 0x70)

Bit(s)	Name	Description
11:11	`BLK_LEVEL_AVG`
5:5	`ENABLE`
0:4	`NUM_DARKPIXEL`

Table 1.28. DigitalTestPattern (Address: 0x7f)

Bit(s)	Name	Description
14:14	`FLIPDATA`
13:13	`ENABLE`
11:12	`GRAY_SHADE_MODE`
10:10	`TWI_TESTDATA_ENABLE`
10:14	`MODE`
0:9	`TWI_TESTDATA`

Table 1.29. AEC_AGC_EnableAB (Address: 0xaf)

Bit(s)	Name	Description
9:9	`AGC_ENABLE_B`
8:8	`AEC_ENABLE_B`
1:1	`AGC_ENABLE_A`
0:0	`AEC_ENABLE_A`

CameraMT9D111

Device Revision: 0 .0

Properties

Table 1.30. RawRegisters

Property	Type	Flags	Description
FWVersion	INT	RW
Reset	INT	RW	The sensor reset bit. 1: Reset, 0: Run
IntegrationTime	INT	RW
uCReset	INT	RW
Standby	BOOL	RW
McuAddress	REGISTER	RW
McuData	REGISTER	RW
ClockControl	REGISTER	RW
CalibControl	INT	RW
CalibGreen1	INT	RW
CalibBlue	INT	RW
CalibRed	INT	RW
CalibGreen2	INT	RW
PLLControl1	INT	RW
PLLControl2	INT	RW
ResetSOC	INT	RW
TestPattern	MODE	RW
ModeConfig	REGISTER	RW
AutoWhiteBalance	BOOL	RW
AutoExposure	BOOL	RW
RowStart	INT	RW
ColStart	INT	RW
RowHeight	INT	RW
ColWidth	INT	RW
CropX0	INT	RW
CropX1	INT	RW
CropY0	INT	RW
CropY1	INT	RW
DecimatorControl	INT	RW
DecimationH	INT	RW
DecimationV	INT	RW
Freeze	BOOL	RW
PLL	STRUCT	RW
InternalClockControl	STRUCT	RW
Gain	STRUCT	RW

Table 1.31. CameraControl

Property	Type	Flags	Description
ModeA	STRUCT	RW
ModeB	STRUCT	RW
YUV	STRUCT	RW
Sequencer	STRUCT	RW
JPEG	STRUCT	RW	JPEG generation parameters
SpoofMode	STRUCT	RW	Spoofmode parameters (stream data dimension)w

Table 1.32. AF

Property	Type	Flags	Description
AfVmt	REGISTER	RW	Pointer to AF driver VMT
AfWindowPos	REGISTER	RW	Encoded position of upper left corner of 1st AF zone
AfWindowSize	REGISTER	RW	Encoded width and heigh of AF zones
AfNumSteps	REGISTER	RW	Number of steps in 1st coarse scan
AfInitPos	REGISTER	RW	Number of starting position for 1st coarse scan
AfStepSize	REGISTER	RW	Step size used in 2nd fine scan
AfWakeupLine	REGISTER	RW	AF driver wake-up line
AfZoneWeightsHi	REGISTER	RW	Weights for lower 8 AF zones
AfZoneWeightsLo	REGISTER	RW	Weights for upper 8 AF zones
AfDistanceWeight	REGISTER	RW	Reserved, unused
AfBestPosition	REGISTER	RW	In manual mode: user-selected position; otherwise: number of best position
AfShaTh	REGISTER	RW	Min. acceptable difference between max. and min. sharpness score
AfMode	STRUCT	RW
AfModeEx	STRUCT	RW
AfNumSteps2	STRUCT	RW	Number of steps in 2nd fine scan
AfPosition	ARRAY	RW

Table 1.33. AFM

Property	Type	Flags	Description
AfmVmt	REGISTER	RW	Pointer to AFM driver VMT
AfmType	REGISTER	RW	Type of AF lens actuator used (0: none; 1: helimorph; 2: stepper motor; 131: AD5398)
AfmCurpos	REGISTER	RW	Current logical position of AF lens actuator
AfmPrepos	REGISTER	RW	Previous logical position of AF lens actuator
AfmPosmin	REGISTER	RW	Lower limit of physical motion range of AF lens actuator
AfmPosmax	REGISTER	RW	Upper limit of physical motion range of AF lens actuator
AfmPosmacro	REGISTER	RW	Logical macro position of AF lens
AfmBacklash	REGISTER	RW	Logical size of backlash-compensating step
AfmCustctrl	REGISTER	RW	Custom controls; their function depends on type of lens actuator used
AfmTimerVmt	REGISTER	RW	Pointer to timer VMT
AfmTimerStarttime	REGISTER	RW	Timer start time
AfmTimerStoptime	REGISTER	RW	Timer stop time
AfmTimerHiwordmclkfreq	REGISTER	RW	Master clock frequency in Hz divided by 65535
AfmTimerMaxshortdelay	REGISTER	RW	Max. expected duration of short lens move
AfmTimerMaxlongdelay	REGISTER	RW	Max. expected duration of long lens move
AfmTimerMaxquickmove	REGISTER	RW	Max. length of short lens move
AfmSiVmt	REGISTER	RW	Pointer to serial interface VMT
AfmSiClkmask	REGISTER	RW	Mask selecting serial interface clock pad
AfmSiDatamask	REGISTER	RW	Mask selecting serial interface data pad
AfmSiClkqtrprd	REGISTER	RW	Delay for slowing down serial interface clock
AfmSiNeedsack	REGISTER	RW	Switch enabling detection of slave ACK (0: disabled; 1:enabled)
AfmSiSlaveaddr	REGISTER	RW	Slave address used in serial interface transmissions
AfmSmEnabmask	REGISTER	RW	Mask selecting stepper-motor-enabling output
AfmSmDrv0mask	REGISTER	RW	Mask selecting 1st stepper-motor-driving output
AfmSmDrv1mask	REGISTER	RW	Mask selecting 2nd stepper-motor-driving output
AfmSmDrv2mask	REGISTER	RW	Mask selecting 3rd stepper-motor-driving output
AfmSmDrv3mask	REGISTER	RW	Mask selecting 4th stepper-motor-driving output
AfmSmDrvsqtrprd	REGISTER	RW	Delay for slowing stepper-motor-driving waveforms
AfmSmPienabmask	REGISTER	RW	Mask selecting photointerrupter-enabling output
AfmSmPioutmask	REGISTER	RW	Mask selecting photointerrupter-sensing input
AfmSmPiedgeoffset	REGISTER	RW	Distance between PI signal edge and desired initial position of stepper motor
AfmStatus	STRUCT	RW	Status of AF lens actuator
AfmTimerConfig	STRUCT	RW	Determines how AFM driver estimates time needed to move AF lens
AfmSmDrvsgenmode	STRUCT	RW	Controls generation of stepper-motor-driving waveforms by GPIO
AfmSmPiconfig	STRUCT	RW	Controls photointerrupter use in initial stepper motor positioning

Table 1.34. SFR

Property	Type	Flags	Description
GpioData	REGISTER	RW
GpioOutputToggle	REGISTER	RW	(write only)
GpioOutputSet	REGISTER	RW	(write only)
GpioOutputClear	REGISTER	RW	(write only)
GpioDir	REGISTER	RW	Clear the bit for an output; Set the bit for an input
GpioDirReverse	REGISTER	RW	(write only)
GpioDirIn	REGISTER	RW	(write only)
GpioDirOut	REGISTER	RW	(write only)
GpioWgN1	REGISTER	RW	...or high byte at GPIO-0. Write: sets duration; Read: remaining duration
GpioWgN0	REGISTER	RW	Write: sets duration; Read: remaining duration
GpioWgN3	REGISTER	RW	...or high byte at GPIO-2. Write: sets duration; Read: remaining duration
GpioWgN2	REGISTER	RW	Write: sets duration; Read: remaining duration
GpioWgN5	REGISTER	RW	...or high byte at GPIO-4. Write: sets duration; Read: remaining duration
GpioWgN4	REGISTER	RW	Write: sets duration; Read: remaining duration
GpioWgN7	REGISTER	RW	...or high byte at GPIO-6. Write: sets duration; Read: remaining duration
GpioWgN6	REGISTER	RW	Write: sets duration; Read: remaining duration
GpioWgChain	REGISTER	RW
GpioWgClkdivSel	REGISTER	RW	0 = divider 1; 1 = divider 2
GpioWgFrameSync	REGISTER	RW
GpioWgReset	REGISTER	RW	Set bits to 1 to stop; 0 to start.
GpioWgSuspend	REGISTER	RW	Set bits to 1 to suspend; 0 to resume.
GpioNsType	REGISTER	RW	Set bits to 1 to enable Notification Signal.
GpioNsEdge	REGISTER	RW	Write 1's for rising edge; 0's for falling edge.
GpioNsMask	REGISTER	RW
GpioWgStrobeSync	REGISTER	RW
GpioWgStatus	REGISTER	RW	Write 1's to clear
GpioWgConfig	STRUCT	RW
GpioWgClkdiv	STRUCT	RW
Gpio01WgT	ARRAY	RW
Gpio23WgT	ARRAY	RW
Gpio45WgT	ARRAY	RW
Gpio67WgT	ARRAY	RW

Table 1.35. SEQ

Property	Type	Flags	Description
SeqVmt	REGISTER	RW
SeqCmd	REGISTER	RW	0-Run;1-Preview;2-Capture;3-Standby;4-Lock;5-Refresh;6-Refresh Mode
SeqState	REGISTER	RW	0-Run;1-ToPreview;2-Enter;3-Preview;4-Leave;5-ToCapture;6-Enter;7-Capture;8-Leave;9-Standby
SeqAeContbuff	REGISTER	RW
SeqAeContstep	REGISTER	RW
SeqAeFastbuff	REGISTER	RW
SeqAeFaststep	REGISTER	RW
SeqAwbContbuff	REGISTER	RW
SeqAwbContstep	REGISTER	RW
SeqAwbFastbuff	REGISTER	RW
SeqAwbFaststep	REGISTER	RW
SeqReserved2	REGISTER	RW
SeqReserved3	REGISTER	RW
SeqTotMaxframes	REGISTER	RW
SeqFlashTh	REGISTER	RW
SeqOutdoorTh	REGISTER	RW
SeqLlvirtgain1	REGISTER	RW
SeqLlvirtgain2	REGISTER	RW
SeqLlsat1	REGISTER	RW
SeqLlsat2	REGISTER	RW
SeqLlinterpthresh1	REGISTER	RW
SeqLlinterpthresh2	REGISTER	RW
SeqLlapcorr1	REGISTER	RW
SeqLlapcorr2	REGISTER	RW
SeqLlapthresh1	REGISTER	RW
SeqLlapthresh2	REGISTER	RW
SeqCapNumframes	REGISTER	RW	Number of still frames captured
SeqPreview0Ae	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
SeqPreview0Fd	REGISTER	RW	0-Off;1-Continuous;2-Manual
SeqPreview0Awb	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview0Af	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
SeqPreview0Hg	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview0Flash	REGISTER	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
SeqPreview1Ae	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
SeqPreview1Fd	REGISTER	RW	0-Off;1-Continuous;2-Manual
SeqPreview1Awb	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview1Af	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
SeqPreview1Hg	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview1Flash	REGISTER	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
SeqPreview2Ae	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
SeqPreview2Fd	REGISTER	RW	0-Off;1-Continuous;2-Manual
SeqPreview2Awb	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview2Af	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
SeqPreview2Hg	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview2Flash	REGISTER	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
SeqPreview3Ae	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
SeqPreview3Fd	REGISTER	RW	0-Off;1-Continuous;2-Manual
SeqPreview3Awb	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview3Af	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
SeqPreview3Hg	REGISTER	RW	0-Off;1-Fast;2-Manual;3-Continuous
SeqPreview3Flash	REGISTER	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
SeqMode	STRUCT	RW	Setting bit enables corresponding driver
SeqStepmode	STRUCT	RW
SeqFlashtype	STRUCT	RW
SeqResetLevelTh	STRUCT	RW
SeqLlmode	STRUCT	RW
SeqCapMode	STRUCT	RW
SeqPreview0Skipframe	STRUCT	RW
SeqPreview1Skipframe	STRUCT	RW
SeqPreview2Skipframe	STRUCT	RW
SeqPreview3Skipframe	STRUCT	RW

Low level address map

CORE

Table 1.36. Address map CORE starting at absolute address 0x0000

Offset [Span]	Name(Id)	Access	Description
`0x0001 [2]`	RowWindowStart	RW	Minimum 20 is recommended
`0x0002 [2]`	ColWindowStart	RW	Minimum 52 is recommended
`0x0003 [2]`	RowWindowSize	RW	Number of rows to be read out (min 2)
`0x0004 [2]`	ColWindowSize	RW	Number of columns [min 9 1ADC; 17 2ADC]
`0x0005 [2]`	HorzBlankB	RW	Number of columns
`0x0006 [2]`	VertBlankB	RW	Number of rows
`0x0007 [2]`	HorzBlankA	RW	Number of columns
`0x0008 [2]`	VertBlankA	RW	Number of rows
`0x0009 [2]`	IntegTime	RW	Integration time in Number of rows
`0x000a [2]`	PixclkSpeedCtrl	RW
`0x000b [2]`	ExtraDelay	RW	In pixel clocks
`0x000c [2]`	ShutterDelay	RW	In pixel clocks
`0x000d [2]`	Reset	RW
`0x001f [2]`	FrameValidControl	RW
`0x0020 [2]`	ReadModeB	RW
`0x0021 [2]`	ReadModeA	RW
`0x0022 [2]`	DarkRowsCols	RW	value of N adds N+1 darks rows to be read out
`0x0023 [2]`	FlashControl	RW
`0x0024 [2]`	ExtraReset	RW
`0x0025 [2]`	LineValidControl	RW
`0x002b [2]`	Green1Gain	RW
`0x002c [2]`	BlueGain	RW
`0x002d [2]`	RedGain	RW
`0x002e [2]`	Green2Gain	RW
`0x002f [2]`	GlobalGain	RW	Sets all 4 gain regs when read reads Green1 Gain
`0x0030 [2]`	RowNoiseControl	RW
`0x005f [2]`	CalThreshold	RW
`0x0060 [2]`	CalCtrl	RW
`0x0061 [2]`	CalG1	RW
`0x0062 [2]`	CalB	RW
`0x0063 [2]`	CalR	RW
`0x0064 [2]`	CalG2	RW
`0x0065 [2]`	ClockEnabling	RW
`0x0066 [2]`	Pll	RW
`0x0067 [2]`	Pll2	RW
`0x00c0 [2]`	GrstControl	RW
`0x00c1 [2]`	StartIntegration	RW
`0x00c2 [2]`	StartReadout	RW
`0x00c3 [2]`	AssertStrobe	RW
`0x00c4 [2]`	DeAssertStrobe	RW
`0x00c5 [2]`	AssertFlash	RW
`0x00c6 [2]`	DeAssertFlash	RW
`0x00e0 [2]`	Extsamp3	RO
`0x00e1 [2]`	Extsamp2	RO
`0x00e2 [2]`	Extsamp1	RO
`0x00e3 [2]`	ExtsampCtr	RW
`0x00f0 [2]`	AddrSpaceSel	RW	Must be 0 to read/write to sensor
`0x00f1 [2]`	BytewiseAddr	RW	Reserved
`0x00f2 [2]`	ContextControl	RW
`0x8026 [1]`	DarkRowsBottom	RW
`0x8059 [1]`	BlackRows	RW	must be enabled with Reg 0x22
`0x805b [1]`	DarkG1Avg	RO
`0x805c [1]`	DarkBAvg	RO
`0x805d [1]`	DarkRAvg	RO
`0x805e [1]`	DarkG2Avg	RO

SFR

Table 1.37. Address map SFR starting at absolute address 0x1000

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	GpioWgBase	RW	GPIO Waveform generator table base descriptor dummy register
`0x0070 [2]`	GpioData	RW
`0x0072 [2]`	GpioOutputToggle	WO	(write only)
`0x0074 [2]`	GpioOutputSet	WO	(write only)
`0x0076 [2]`	GpioOutputClear	WO	(write only)
`0x0078 [2]`	GpioDir	RW	Clear the bit for an output; Set the bit for an input
`0x007a [2]`	GpioDirReverse	WO	(write only)
`0x007c [2]`	GpioDirIn	WO	(write only)
`0x007e [2]`	GpioDirOut	WO	(write only)
`0x00b9 [2]`	GpioNsEdge	RW	Write 1's for rising edge; 0's for falling edge.
`0x00bb [2]`	GpioNsMask	RW
`0x00be [2]`	GpioWgStatus	RW	Write 1's to clear
`0x8080 [1]`	GpioWgT01	RW	...or high byte of GPIO-0 subperiod in 16-bit mode
`0x8081 [1]`	GpioWgT00	RW
`0x8082 [1]`	GpioWgT11	RW	...or high byte of GPIO-0 subperiod in 16-bit mode
`0x8083 [1]`	GpioWgT10	RW
`0x8084 [1]`	GpioWgT21	RW	...or high byte of GPIO-0 subperiod in 16-bit mode
`0x8085 [1]`	GpioWgT20	RW
`0x8086 [1]`	GpioWgT31	RW	...or high byte of GPIO-0 subperiod in 16-bit mode
`0x8087 [1]`	GpioWgT30	RW
`0x8088 [1]`	GpioWgT41	RW	...or high byte of GPIO-0 subperiod in 16-bit mode
`0x8089 [1]`	GpioWgT40	RW
`0x808a [1]`	GpioWgN1	RW	...or high byte at GPIO-0. Write: sets duration; Read: remaining duration
`0x808b [1]`	GpioWgN0	RW	Write: sets duration; Read: remaining duration
`0x808c [1]`	GpioWgT03	RW	...or high byte of GPIO-2 subperiod in 16-bit mode
`0x808d [1]`	GpioWgT02	RW
`0x808e [1]`	GpioWgT13	RW	...or high byte of GPIO-2 subperiod in 16-bit mode
`0x808f [1]`	GpioWgT12	RW
`0x8090 [1]`	GpioWgT23	RW	...or high byte of GPIO-2 subperiod in 16-bit mode
`0x8091 [1]`	GpioWgT22	RW
`0x8092 [1]`	GpioWgT33	RW	...or high byte of GPIO-2 subperiod in 16-bit mode
`0x8093 [1]`	GpioWgT32	RW
`0x8094 [1]`	GpioWgT43	RW	...or high byte of GPIO-2 subperiod in 16-bit mode
`0x8095 [1]`	GpioWgT42	RW
`0x8096 [1]`	GpioWgN3	RW	...or high byte at GPIO-2. Write: sets duration; Read: remaining duration
`0x8097 [1]`	GpioWgN2	RW	Write: sets duration; Read: remaining duration
`0x8098 [1]`	GpioWgT05	RW	...or high byte of GPIO-4 subperiod in 16-bit mode
`0x8099 [1]`	GpioWgT04	RW
`0x809a [1]`	GpioWgT15	RW	...or high byte of GPIO-4 subperiod in 16-bit mode
`0x809b [1]`	GpioWgT14	RW
`0x809c [1]`	GpioWgT25	RW	...or high byte of GPIO-4 subperiod in 16-bit mode
`0x809d [1]`	GpioWgT24	RW
`0x809e [1]`	GpioWgT35	RW	...or high byte of GPIO-4 subperiod in 16-bit mode
`0x809f [1]`	GpioWgT34	RW
`0x80a0 [1]`	GpioWgT45	RW	...or high byte of GPIO-4 subperiod in 16-bit mode
`0x80a1 [1]`	GpioWgT44	RW
`0x80a2 [1]`	GpioWgN5	RW	...or high byte at GPIO-4. Write: sets duration; Read: remaining duration
`0x80a3 [1]`	GpioWgN4	RW	Write: sets duration; Read: remaining duration
`0x80a4 [1]`	GpioWgT07	RW	...or high byte of GPIO-6 subperiod in 16-bit mode
`0x80a5 [1]`	GpioWgT06	RW
`0x80a6 [1]`	GpioWgT17	RW	...or high byte of GPIO-6 subperiod in 16-bit mode
`0x80a7 [1]`	GpioWgT16	RW
`0x80a8 [1]`	GpioWgT27	RW	...or high byte of GPIO-6 subperiod in 16-bit mode
`0x80a9 [1]`	GpioWgT26	RW
`0x80aa [1]`	GpioWgT37	RW	...or high byte of GPIO-6 subperiod in 16-bit mode
`0x80ab [1]`	GpioWgT36	RW
`0x80ac [1]`	GpioWgT47	RW	...or high byte of GPIO-6 subperiod in 16-bit mode
`0x80ad [1]`	GpioWgT46	RW
`0x80ae [1]`	GpioWgN7	RW	...or high byte at GPIO-6. Write: sets duration; Read: remaining duration
`0x80af [1]`	GpioWgN6	RW	Write: sets duration; Read: remaining duration
`0x80b0 [1]`	GpioWgConfig	RW
`0x80b1 [1]`	GpioWgChain	RW
`0x80b2 [1]`	GpioWgClkdiv	RW
`0x80b3 [1]`	GpioWgClkdivSel	RW	0 = divider 1; 1 = divider 2
`0x80b4 [1]`	GpioWgFrameSync	RW
`0x80b5 [1]`	GpioWgReset	RW	Set bits to 1 to stop; 0 to start.
`0x80b6 [1]`	GpioWgSuspend	RW	Set bits to 1 to suspend; 0 to resume.
`0x80b8 [1]`	GpioNsType	RW	Set bits to 1 to enable Notification Signal.
`0x80bd [1]`	GpioWgStrobeSync	RW

MON

Table 1.38. Address map MON starting at absolute address 0x2000

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	MonVmt	RW
`0x0003 [2]`	MonArg1	RW
`0x0005 [2]`	MonArg2	RW
`0x0008 [2]`	MonMsgHi	RW
`0x000a [2]`	MonMsgLo	RW
`0x8002 [1]`	MonCmd	RW
`0x8007 [1]`	MonMsgcount	RW
`0x800c [1]`	MonVer	RW

SEQ

Table 1.39. Address map SEQ starting at absolute address 0x2100

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	SeqVmt	RW
`0x8002 [1]`	SeqMode	RW	Setting bit enables corresponding driver
`0x8003 [1]`	SeqCmd	RW	0-Run;1-Preview;2-Capture;3-Standby;4-Lock;5-Refresh;6-Refresh Mode
`0x8004 [1]`	SeqState	RW	0-Run;1-ToPreview;2-Enter;3-Preview;4-Leave;5-ToCapture;6-Enter;7-Capture;8-Leave;9-Standby
`0x8005 [1]`	SeqStepmode	RW
`0x8006 [1]`	SeqFlashtype	RW
`0x8007 [1]`	SeqAeContbuff	RW
`0x8008 [1]`	SeqAeContstep	RW
`0x8009 [1]`	SeqAeFastbuff	RW
`0x800a [1]`	SeqAeFaststep	RW
`0x800b [1]`	SeqAwbContbuff	RW
`0x800c [1]`	SeqAwbContstep	RW
`0x800d [1]`	SeqAwbFastbuff	RW
`0x800e [1]`	SeqAwbFaststep	RW
`0x800f [1]`	SeqResetLevelTh	RW
`0x8010 [1]`	SeqReserved2	RW
`0x8011 [1]`	SeqReserved3	RW
`0x8012 [1]`	SeqTotMaxframes	RW
`0x8013 [1]`	SeqFlashTh	RW
`0x8014 [1]`	SeqOutdoorTh	RW
`0x8015 [1]`	SeqLlmode	RW
`0x8016 [1]`	SeqLlvirtgain1	RW
`0x8017 [1]`	SeqLlvirtgain2	RW
`0x8018 [1]`	SeqLlsat1	RW
`0x8019 [1]`	SeqLlsat2	RW
`0x801a [1]`	SeqLlinterpthresh1	RW
`0x801b [1]`	SeqLlinterpthresh2	RW
`0x801c [1]`	SeqLlapcorr1	RW
`0x801d [1]`	SeqLlapcorr2	RW
`0x801e [1]`	SeqLlapthresh1	RW
`0x801f [1]`	SeqLlapthresh2	RW
`0x8020 [1]`	SeqCapMode	RW
`0x8021 [1]`	SeqCapNumframes	RW	Number of still frames captured
`0x8022 [1]`	SeqPreview0Ae	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
`0x8023 [1]`	SeqPreview0Fd	RW	0-Off;1-Continuous;2-Manual
`0x8024 [1]`	SeqPreview0Awb	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x8025 [1]`	SeqPreview0Af	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
`0x8026 [1]`	SeqPreview0Hg	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x8027 [1]`	SeqPreview0Flash	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
`0x8028 [1]`	SeqPreview0Skipframe	RW
`0x8029 [1]`	SeqPreview1Ae	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
`0x802a [1]`	SeqPreview1Fd	RW	0-Off;1-Continuous;2-Manual
`0x802b [1]`	SeqPreview1Awb	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x802c [1]`	SeqPreview1Af	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
`0x802d [1]`	SeqPreview1Hg	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x802e [1]`	SeqPreview1Flash	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
`0x802f [1]`	SeqPreview1Skipframe	RW
`0x8030 [1]`	SeqPreview2Ae	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
`0x8031 [1]`	SeqPreview2Fd	RW	0-Off;1-Continuous;2-Manual
`0x8032 [1]`	SeqPreview2Awb	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x8033 [1]`	SeqPreview2Af	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
`0x8034 [1]`	SeqPreview2Hg	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x8035 [1]`	SeqPreview2Flash	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
`0x8036 [1]`	SeqPreview2Skipframe	RW
`0x8037 [1]`	SeqPreview3Ae	RW	0-Off;1-Fast;2-Manual;3-Continuous;4-Fast+Mettering;5-Fast+AutoContrast
`0x8038 [1]`	SeqPreview3Fd	RW	0-Off;1-Continuous;2-Manual
`0x8039 [1]`	SeqPreview3Awb	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x803a [1]`	SeqPreview3Af	RW	0-Off;1-Fast;2-Manual;3-Continuous;5-Creep compensation
`0x803b [1]`	SeqPreview3Hg	RW	0-Off;1-Fast;2-Manual;3-Continuous
`0x803c [1]`	SeqPreview3Flash	RW	0-Off;1-On;2-Locked;3-AutoEvaluate;7-User defined
`0x803d [1]`	SeqPreview3Skipframe	RW

SOC1

Table 1.40. Address map SOC1 starting at absolute address 0x0100

Offset [Span]	Name(Id)	Access	Description
`0x0008 [2]`	ColorPipelineControl	RW
`0x000a [2]`	PadSlew	RW
`0x000b [2]`	InternalClockControl	RW
`0x0011 [2]`	LowerXBoundZoomWindow	RW
`0x0012 [2]`	UpperXBoundZoomWindow	RW
`0x0013 [2]`	LowerYBoundZoomWindow	RW
`0x0014 [2]`	UpperYBoundZoomWindow	RW
`0x0015 [2]`	DecimatorControl	RW
`0x0016 [2]`	WeightHorizDecimation	RW
`0x0017 [2]`	WeightVerticalDecimation	RW
`0x0020 [2]`	LumLimitsWbStats	RW
`0x002d [2]`	RightLeftCoordsAwbWindow	RW
`0x002e [2]`	BottomTopCoordsAwbWindow	RW
`0x0035 [2]`	_1dApertureParameters	RW
`0x0036 [2]`	ApertureParameters	RW
`0x003b [2]`	BlackLevel2nd	RW
`0x003c [2]`	BlackLevel1st	RW
`0x0044 [2]`	MirrorSensorR32	RO
`0x0045 [2]`	MirrorSensorR242	RO
`0x0046 [2]`	MirrorSensorR33	RO
`0x0049 [2]`	TestPatternR	RW
`0x004a [2]`	TestPatternG	RW
`0x004b [2]`	TestPatternB	RW
`0x0050 [2]`	FactoryTest	RO
`0x0060 [2]`	ColorCorrMatrixScale14	RW
`0x0061 [2]`	ColorCorrMatrixScale11	RW
`0x0062 [2]`	ColorCorrMatrix12	RW
`0x0063 [2]`	ColorCorrMatrix34	RW
`0x0064 [2]`	ColorCorrMatrix56	RW
`0x0065 [2]`	ColorCorrMatrix78	RW
`0x0066 [2]`	ColorCorrMatrix9	RW
`0x006a [2]`	DigitalGain1Red	RW	Default setting corresponds to gain value of 1.
`0x006b [2]`	DigitalGain1Green1	RW	Default setting corresponds to gain value of 1.
`0x006c [2]`	DigitalGain1Green2	RW	Default setting corresponds to gain value of 1.
`0x006d [2]`	DigitalGain1Blue	RW	Default setting corresponds to gain value of 1.
`0x006e [2]`	DigitalGain1AllColors	RW	Write 128 to set all gains [R106-R109] to 1. When read, this register returns the value of R107.
`0x007a [2]`	BoundsFdWindowLeftWidth	RW
`0x007b [2]`	BoundsFdWindowTopHeight	RW
`0x007c [2]`	FdMeasurementWindowSize	RW
`0x007d [2]`	AverageLuminanceFdWindow	RO
`0x0099 [2]`	LineCount	RW
`0x009a [2]`	FrameCount	RW
`0x00a4 [2]`	SpecialEffects	RW
`0x00a5 [2]`	SepiaConstants	RW
`0x00b2 [2]`	GammaCurveKnees01	RW
`0x00b3 [2]`	GammaCurveKnees23	RW
`0x00b4 [2]`	GammaCurveKnees45	RW
`0x00b5 [2]`	GammaCurveKnees67	RW
`0x00b6 [2]`	GammaCurveKnees89	RW
`0x00b7 [2]`	GammaCurveKnees1011	RW
`0x00b8 [2]`	GammaCurveKnees1213	RW
`0x00b9 [2]`	GammaCurveKnees1415	RW
`0x00ba [2]`	GammaCurveKnees1617	RW
`0x00bf [2]`	YRgbOffset	RW
`0x00c3 [2]`	McuBootMode	RW
`0x00c6 [2]`	McuAddress	RW
`0x00c8 [2]`	McuData0	RW	Can be used for single data or burst mode
`0x00c9 [2]`	McuData1	RW	Microcontroller variable data using burst SHIP access
`0x00ca [2]`	McuData2	RW	Microcontroller variable data using burst SHIP access
`0x00cb [2]`	McuData3	RW	Microcontroller variable data using burst SHIP access
`0x00cc [2]`	McuData4	RW	Microcontroller variable data using burst SHIP access
`0x00cd [2]`	McuData5	RW
`0x00ce [2]`	McuData6	RW
`0x00cf [2]`	McuData7	RW
`0x00d0 [2]`	McuData8	RW
`0x00d1 [2]`	McuData9	RW
`0x00f0 [2]`	PageRegister	RW
`0x00f1 [2]`	BytewiseAddress	RW
`0x8009 [1]`	FactoryBypass	RW
`0x8030 [1]`	RedAwbMeasurement	RO
`0x8031 [1]`	LumaAwbMeasurement	RO
`0x8032 [1]`	BlueAwbMeasurement	RO
`0x8037 [1]`	Filters	RW
`0x8043 [1]`	EnPreviewSupport	RW	1 - enable
`0x8047 [1]`	ThreshEdgeDetect	RW	Threshold for identifying pixel neighborhood as having an edge.
`0x8048 [1]`	TestPattern	RW
`0x804e [1]`	DigitalGain2	RW
`0x8096 [1]`	BlankFrames	RW
`0x8097 [1]`	OutputFormatConfig	RW
`0x8098 [1]`	OutputFormatTest	RW
`0x80bb [1]`	GammaCurveKnee18	RW
`0x80be [1]`	YuvYcbcrControl	RW

AE

Table 1.41. Address map AE starting at absolute address 0x2200

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	AeVmt	RW
`0x0004 [2]`	AeWakeupline	RW	Line number when MCU wakes up
`0x000b [2]`	AeMaxR12	RW	Maximum of R12:0
`0x0014 [2]`	AeMaxDgainAe1	RW	Max digital gain pre-LC
`0x001c [2]`	AeR12	RW	Current shutter delay value
`0x0022 [2]`	AeDgainAe1	RW	Current digital gain pre-LC
`0x0025 [2]`	AeR9	RW	Current R9:0 value
`0x0028 [2]`	AeRowtime	RW
`0x002c [2]`	AeBufferedLuma	RW
`0x002f [2]`	AeR9Step	RW	Integration time of one zone
`0x0033 [2]`	AePhysGainR	RW	Physical R analog gain
`0x0035 [2]`	AePhysGainG	RW	Physical G analog gain
`0x0037 [2]`	AePhysGainB	RW	Physical B analog gain
`0x8002 [1]`	AeWindowPos	RW	Y0 and X0 (1/16 frame size)
`0x8003 [1]`	AeWindowSize	RW	Height and Width
`0x8006 [1]`	AeTarget	RW	Target brightness
`0x8007 [1]`	AeGate	RW	AE sensitivity
`0x8008 [1]`	AeSkipFrames	RW	Frequency of AE update
`0x8009 [1]`	AeJumpDivisor	RW	Shortens jump (1=fastest)
`0x800a [1]`	AeLumaBufferSpeed	RW	32=fastest; 1=slowest
`0x800d [1]`	AeMinIndex	RW	Min allowed zone number
`0x800e [1]`	AeMaxIndex	RW	Max allowed zone number
`0x800f [1]`	AeMinVirtgain	RW	Min allowed virtual gain
`0x8010 [1]`	AeMaxVirtgain	RW	Max allowed virtual gain
`0x8011 [1]`	AeMaxAdcHi	RW	Max ADC Vref_hi
`0x8012 [1]`	AeMinAdcHi	RW	Min ADC Vref_hi
`0x8013 [1]`	AeMinAdcLo	RW	Min ADC Vref_lo
`0x8016 [1]`	AeMaxDgainAe2	RW	Max digital gain post-LC
`0x8017 [1]`	AeIndexTh23	RW	Sets FPS at normal illumination
`0x8018 [1]`	AeMaxgain23	RW	Sets FPS at low-light
`0x8019 [1]`	AeWeights	RW
`0x801a [1]`	AeStatus	RW
`0x801b [1]`	AeCurrentY	RW	Last measured luminance
`0x801e [1]`	AeIndex	RW	Current zone - integration time
`0x801f [1]`	AeVirtgain	RW
`0x8020 [1]`	AeAdcHi	RW
`0x8021 [1]`	AeAdcLo	RW
`0x8024 [1]`	AeDgainAe2	RW	Current digital gain post-LC
`0x8027 [1]`	AeR65	RW	Current ADC Vref value
`0x802a [1]`	AeGainr12	RW
`0x802b [1]`	AeSkipFramesCnt	RW	Counter of skipped frames
`0x802e [1]`	AeDirAePrev	RW	Previous state of AE
`0x8032 [1]`	AeMaxAdcLo	RW	Max ADC Vref_lo
`0x8057 [1]`	AeNumOe	RW

SOC2

Table 1.42. Address map SOC2 starting at absolute address 0x0200

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	JpegControl	RW
`0x0002 [2]`	JpegStatus0	RW
`0x0003 [2]`	JpegStatus1	RO
`0x000d [2]`	JpegConfigOutput0	RW
`0x000e [2]`	JpegConfigOutput1	RW
`0x0010 [2]`	JpegSpoofWidth	RW
`0x0011 [2]`	JpegSpoofHeight	RW
`0x0012 [2]`	JpegSpoofLvTiming	RW
`0x001d [2]`	JpegRamTestCtrl	RW
`0x001e [2]`	JpegIndirectRegCtrl	RW
`0x001f [2]`	JpegIndirectRegData	RW
`0x0020 [2]`	JpegIndirectData1	RW
`0x0021 [2]`	JpegIndirectData2	RW
`0x0022 [2]`	JpegIndirectData3	RW
`0x0023 [2]`	JpegIndirectData4	RW
`0x0024 [2]`	JpegIndirectData5	RW
`0x0025 [2]`	JpegIndirectData6	RW
`0x0026 [2]`	JpegIndirectData7	RW
`0x0027 [2]`	JpegIndirectData8	RW
`0x0028 [2]`	JpegIndirectData9	RW
`0x0029 [2]`	JpegIndirectData10	RW
`0x002a [2]`	JpegIndirectData11	RW
`0x002b [2]`	JpegIndirectData12	RW
`0x002c [2]`	JpegIndirectData13	RW
`0x002d [2]`	JpegIndirectData14	RW
`0x002e [2]`	JpegIndirectData15	RW
`0x0040 [2]`	BoundsFirstAfWindTopLeft	RW
`0x0041 [2]`	BoundsAfWindHeightWidth	RW
`0x0042 [2]`	AfMeasurementWindowSize	RW	Specifies number of pixels in the window used by AF measurement engine.
`0x0043 [2]`	AvgLuminanceW11W12	RO
`0x0044 [2]`	AvgLuminanceW13W14	RO
`0x0045 [2]`	AvgLuminanceW21W22	RO
`0x0046 [2]`	AvgLuminanceW23W24	RO
`0x0047 [2]`	AvgLuminanceW31W32	RO
`0x0048 [2]`	AvgLuminanceW33W34	RO
`0x0049 [2]`	AvgLuminanceW41W42	RO
`0x004a [2]`	AvgLuminanceW43W44	RO
`0x004b [2]`	AfFilter1	RW
`0x004c [2]`	AfFilter1Parameters	RW
`0x004d [2]`	AvgSharpness1W11W12	RO
`0x004e [2]`	AvgSharpness1W13W14	RO
`0x004f [2]`	AvgSharpness1W21W22	RO
`0x0050 [2]`	AvgSharpness1W23W24	RO
`0x0051 [2]`	AvgSharpness1W31W32	RO
`0x0052 [2]`	AvgSharpness1W33W34	RO
`0x0053 [2]`	AvgSharpness1W41W42	RO
`0x0054 [2]`	AvgSharpness1W43W44	RO
`0x0055 [2]`	AfFilter2	RW
`0x0056 [2]`	AfFilter2Parameters	RW
`0x0057 [2]`	AvgSharpness2W11W12	RO
`0x0058 [2]`	AvgSharpness2W13W14	RO
`0x0059 [2]`	AvgSharpness2W21W22	RO
`0x005a [2]`	AvgSharpness2W23W24	RO
`0x005b [2]`	AvgSharpness2W31W32	RO
`0x005c [2]`	AvgSharpness2W33W34	RO
`0x005d [2]`	AvgSharpness2W41W42	RO
`0x005e [2]`	AvgSharpness2W43W44	RO
`0x0080 [2]`	LensCorrectionControl	RW
`0x0081 [2]`	ZoneBoundsX1X2	RW
`0x0082 [2]`	ZoneBoundsX0X3	RW
`0x0083 [2]`	ZoneBoundsX4X5	RW
`0x0084 [2]`	ZoneBoundsY1Y2	RW
`0x0085 [2]`	ZoneBoundsY0Y3	RW
`0x0086 [2]`	ZoneBoundsY4Y5	RW
`0x0087 [2]`	CenterOffset	RW
`0x0088 [2]`	FxRed	RW
`0x0089 [2]`	FxGreen	RW
`0x008a [2]`	FxBlue	RW
`0x008b [2]`	FyRed	RW
`0x008c [2]`	FyGreen	RW
`0x008d [2]`	FyBlue	RW
`0x008e [2]`	DfDxRed	RW
`0x008f [2]`	DfDxGreen	RW
`0x0090 [2]`	DfDxBlue	RW
`0x0091 [2]`	DfDyRed	RW
`0x0092 [2]`	DfDyGreen	RW
`0x0093 [2]`	DfDyBlue	RW
`0x0094 [2]`	SecondDerivZone0Red	RW
`0x0095 [2]`	SecondDerivZone0Green	RW
`0x0096 [2]`	SecondDerivZone0Blue	RW
`0x0097 [2]`	SecondDerivZone1Red	RW
`0x0098 [2]`	SecondDerivZone1Green	RW
`0x0099 [2]`	SecondDerivZone1Blue	RW
`0x009a [2]`	SecondDerivZone2Red	RW
`0x009b [2]`	SecondDerivZone2Green	RW
`0x009c [2]`	SecondDerivZone2Blue	RW
`0x009d [2]`	SecondDerivZone3Red	RW
`0x009e [2]`	SecondDerivZone3Green	RW
`0x009f [2]`	SecondDerivZone3Blue	RW
`0x00a0 [2]`	SecondDerivZone4Red	RW
`0x00a1 [2]`	SecondDerivZone4Green	RW
`0x00a2 [2]`	SecondDerivZone4Blue	RW
`0x00a3 [2]`	SecondDerivZone5Red	RW
`0x00a4 [2]`	SecondDerivZone5Green	RW
`0x00a5 [2]`	SecondDerivZone5Blue	RW
`0x00a6 [2]`	SecondDerivZone6Red	RW
`0x00a7 [2]`	SecondDerivZone6Green	RW
`0x00a8 [2]`	SecondDerivZone6Blue	RW
`0x00a9 [2]`	SecondDerivZone7Red	RW
`0x00aa [2]`	SecondDerivZone7Green	RW
`0x00ab [2]`	SecondDerivZone7Blue	RW
`0x00ac [2]`	X2Factors	RW
`0x00ae [2]`	KFactorInKFxFy	RW
`0x00c0 [2]`	AeWindowTopLeft	RW
`0x00c1 [2]`	AeWindowHeightWidth	RW
`0x00c2 [2]`	AeMeasWindowSizeLsw	RW	This register number of pixels in the window used by AE measurement engine.
`0x00c4 [2]`	AvgLuminanceAeW11W12	RO
`0x00c5 [2]`	AvgLuminanceAeW13W14	RO
`0x00c6 [2]`	AvgLuminanceAeW21W22	RO
`0x00c7 [2]`	AvgLuminanceAeW23W24	RO
`0x00c8 [2]`	AvgLuminanceAeW31W32	RO
`0x00c9 [2]`	AvgLuminanceAeW33W34	RO
`0x00ca [2]`	AvgLuminanceAeW41W42	RO
`0x00cb [2]`	AvgLuminanceAeW43W44	RO
`0x00d2 [2]`	ColorKillControls	RW
`0x00d3 [2]`	HistogramLowerBounds	RW
`0x00d4 [2]`	HistogramUpperBounds	RW
`0x00d5 [2]`	BinDefinitions1	RW
`0x00d6 [2]`	BinDefinitions2	RW
`0x00d7 [2]`	HistogramWindowSize	RW
`0x00d8 [2]`	PixelCounts01	RO
`0x00d9 [2]`	PixelCounts23	RO
`0x8004 [1]`	JpegStatus2	RO
`0x8005 [1]`	JpegConfigFe	RW
`0x8006 [1]`	JpegConfigCore	RW	Extended JPEG Quantization Matrix
`0x800a [1]`	JpegCoreBypass	RW
`0x800f [1]`	JpegConfigOutput2	RW
`0x80ad [1]`	GlobalOffsetFxyFunction	RW
`0x80c3 [1]`	AeAfMeasurementEnable	RW

AWB

Table 1.43. Address map AWB starting at absolute address 0x2300

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	AwbVmt	RW
`0x0004 [2]`	AwbWakeupline	RW
`0x0006 [2]`	AwbCcmL0	RW	Left CCM K11
`0x0008 [2]`	AwbCcmL1	RW	Left CCM K12
`0x000a [2]`	AwbCcmL2	RW	Left CCM K13
`0x000c [2]`	AwbCcmL3	RW	Left CCM K21
`0x000e [2]`	AwbCcmL4	RW	Left CCM K22
`0x0010 [2]`	AwbCcmL5	RW	Left CCM K23
`0x0012 [2]`	AwbCcmL6	RW	Left CCM K31
`0x0014 [2]`	AwbCcmL7	RW	Left CCM K32
`0x0016 [2]`	AwbCcmL8	RW	Left CCM K33
`0x0018 [2]`	AwbCcmL9	RW	Left CCM Red/Green gain
`0x001a [2]`	AwbCcmL10	RW	Left CCM Blue/Green gain
`0x001c [2]`	AwbCcmRl0	RW	Delta CCM D11
`0x001e [2]`	AwbCcmRl1	RW	Delta CCM D12
`0x0020 [2]`	AwbCcmRl2	RW	Delta CCM D13
`0x0022 [2]`	AwbCcmRl3	RW	Delta CCM D21
`0x0024 [2]`	AwbCcmRl4	RW	Delta CCM D22
`0x0026 [2]`	AwbCcmRl5	RW	Delta CCM D23
`0x0028 [2]`	AwbCcmRl6	RW	Delta CCM D31
`0x002a [2]`	AwbCcmRl7	RW	Delta CCM D32
`0x002c [2]`	AwbCcmRl8	RW	Delta CCM D33
`0x002e [2]`	AwbCcmRl9	RW	Delta CCM Red/Green gain
`0x0030 [2]`	AwbCcmRl10	RW	Delta CCM Blue/Green gain
`0x0032 [2]`	AwbCcm0	RW	Current CCM C11
`0x0034 [2]`	AwbCcm1	RW	Current CCM C12
`0x0036 [2]`	AwbCcm2	RW	Current CCM C13
`0x0038 [2]`	AwbCcm3	RW	Current CCM C21
`0x003a [2]`	AwbCcm4	RW	Current CCM C22
`0x003c [2]`	AwbCcm5	RW	Current CCM C23
`0x003e [2]`	AwbCcm6	RW	Current CCM C31
`0x0040 [2]`	AwbCcm7	RW	Current CCM C32
`0x0042 [2]`	AwbCcm8	RW	Current CCM C33
`0x0044 [2]`	AwbCcm9	RW	Current CCM Red/Green gain
`0x0046 [2]`	AwbCcm10	RW	Current CCM Blue/Green gain
`0x0054 [2]`	AwbGainrBuf	RW	Time-buffered R gain
`0x0056 [2]`	AwbGainbBuf	RW	Time-buffered B gain
`0x005f [2]`	AwbCntPxlTh	RW	Num pixels on edges to enable WB
`0x8002 [1]`	AwbWindowPos	RW	Y0 and X0
`0x8003 [1]`	AwbWindowSize	RW	Height and width
`0x8048 [1]`	AwbGainBufferSpeed	RW	32=fastest; 1=slowest
`0x8049 [1]`	AwbJumpDivisor	RW	1=fastest
`0x804a [1]`	AwbGainMin	RW	Min AWB digital gain
`0x804b [1]`	AwbGainMax	RW	Max allowed digital gain
`0x804c [1]`	AwbGainR	RW	Current R digital gain
`0x804d [1]`	AwbGainG	RW	Current G digital gain
`0x804e [1]`	AwbGainB	RW	Current B digital gain
`0x804f [1]`	AwbCcmPositionMin	RW	leftmost - incandescent
`0x8050 [1]`	AwbCcmPositionMax	RW	rightmost - daylight
`0x8051 [1]`	AwbCcmPosition	RW	0=incandescent 127=daylight
`0x8052 [1]`	AwbSaturation	RW	128=100%
`0x8058 [1]`	AwbSumr	RW
`0x8059 [1]`	AwbSumy	RW
`0x805a [1]`	AwbSumb	RW
`0x805b [1]`	AwbSteadyBgainOutMin	RW
`0x805c [1]`	AwbSteadyBgainOutMax	RW
`0x805d [1]`	AwbSteadyBgainInMin	RW
`0x805e [1]`	AwbSteadyBgainInMax	RW
`0x8061 [1]`	AwbTgMin0	RW	True Gray minimum
`0x8062 [1]`	AwbTgMax0	RW	True Gray maximum
`0x8063 [1]`	AwbX0	RW
`0x8064 [1]`	AwbKrL	RW
`0x8065 [1]`	AwbKgL	RW
`0x8066 [1]`	AwbKbL	RW
`0x8067 [1]`	AwbKrR	RW
`0x8068 [1]`	AwbKgR	RW
`0x8069 [1]`	AwbKbR	RW

FD

Table 1.44. Address map FD starting at absolute address 0x2400

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	FdVmt	RW
`0x0005 [2]`	FdWakeupline	RW
`0x0011 [2]`	FdR9Step60	RW
`0x0013 [2]`	FdR9Step50	RW
`0x8002 [1]`	FdWindowPosh	RW
`0x8003 [1]`	FdWindowHeight	RW
`0x8004 [1]`	FdMode	RW
`0x8007 [1]`	FdSmoothCnt	RW
`0x8008 [1]`	FdSearchF150	RW
`0x8009 [1]`	FdSearchF250	RW
`0x800a [1]`	FdSearchF160	RW
`0x800b [1]`	FdSearchF260	RW
`0x800c [1]`	FdSkipFrame	RW
`0x800d [1]`	FdStatMin	RW
`0x800e [1]`	FdStatMax	RW
`0x800f [1]`	FdStat	RW
`0x8010 [1]`	FdMinAmplitude	RW

AF

Table 1.45. Address map AF starting at absolute address 0x2500

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	AfVmt	RW	Pointer to AF driver VMT
`0x000a [2]`	AfWakeupLine	RW	AF driver wake-up line
`0x000c [2]`	AfZoneWeightsHi	RW	Weights for lower 8 AF zones
`0x000e [2]`	AfZoneWeightsLo	RW	Weights for upper 8 AF zones
`0x8002 [1]`	AfWindowPos	RW	Encoded position of upper left corner of 1st AF zone
`0x8003 [1]`	AfWindowSize	RW	Encoded width and heigh of AF zones
`0x8004 [1]`	AfMode	RW
`0x8005 [1]`	AfModeEx	RW
`0x8006 [1]`	AfNumSteps	RW	Number of steps in 1st coarse scan
`0x8007 [1]`	AfInitPos	RW	Number of starting position for 1st coarse scan
`0x8008 [1]`	AfNumSteps2	RW	Number of steps in 2nd fine scan
`0x8009 [1]`	AfStepSize	RW	Step size used in 2nd fine scan
`0x8010 [1]`	AfDistanceWeight	RW	Reserved, unused
`0x8011 [1]`	AfBestPosition	RW	In manual mode: user-selected position; otherwise: number of best position
`0x8012 [1]`	AfShaTh	RW	Min. acceptable difference between max. and min. sharpness score
`0x8013 [1]`	AfPosition0	RW
`0x8014 [1]`	AfPosition1	RW
`0x8015 [1]`	AfPosition2	RW
`0x8016 [1]`	AfPosition3	RW
`0x8017 [1]`	AfPosition4	RW
`0x8018 [1]`	AfPosition5	RW
`0x8019 [1]`	AfPosition6	RW
`0x801a [1]`	AfPosition7	RW
`0x801b [1]`	AfPosition8	RW
`0x801c [1]`	AfPosition9	RW
`0x801d [1]`	AfPosition10	RW
`0x801e [1]`	AfPosition11	RW
`0x801f [1]`	AfPosition12	RW
`0x8020 [1]`	AfPosition13	RW
`0x8021 [1]`	AfPosition14	RW
`0x8022 [1]`	AfPosition15	RW
`0x8023 [1]`	AfPosition16	RW
`0x8024 [1]`	AfPosition17	RW
`0x8025 [1]`	AfPosition18	RW
`0x8026 [1]`	AfPosition19	RW

AFM

Table 1.46. Address map AFM starting at absolute address 0x2600

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	AfmVmt	RW	Pointer to AFM driver VMT
`0x000b [2]`	AfmTimerVmt	RW	Pointer to timer VMT
`0x000d [2]`	AfmTimerStarttime	RW	Timer start time
`0x000f [2]`	AfmTimerStoptime	RW	Timer stop time
`0x0011 [2]`	AfmTimerHiwordmclkfreq	RW	Master clock frequency in Hz divided by 65535
`0x0013 [2]`	AfmTimerMaxshortdelay	RW	Max. expected duration of short lens move
`0x0015 [2]`	AfmTimerMaxlongdelay	RW	Max. expected duration of long lens move
`0x0019 [2]`	AfmSiVmt	RW	Pointer to serial interface VMT
`0x001b [2]`	AfmSiClkmask	RW	Mask selecting serial interface clock pad
`0x001d [2]`	AfmSiDatamask	RW	Mask selecting serial interface data pad
`0x001f [2]`	AfmSiClkqtrprd	RW	Delay for slowing down serial interface clock
`0x0023 [2]`	AfmSmEnabmask	RW	Mask selecting stepper-motor-enabling output
`0x0029 [2]`	AfmSmDrvsqtrprd	RW	Delay for slowing stepper-motor-driving waveforms
`0x002c [2]`	AfmSmPienabmask	RW	Mask selecting photointerrupter-enabling output
`0x002e [2]`	AfmSmPioutmask	RW	Mask selecting photointerrupter-sensing input
`0x8002 [1]`	AfmType	RW	Type of AF lens actuator used (0: none; 1: helimorph; 2: stepper motor; 131: AD5398)
`0x8003 [1]`	AfmCurpos	RW	Current logical position of AF lens actuator
`0x8004 [1]`	AfmPrepos	RW	Previous logical position of AF lens actuator
`0x8005 [1]`	AfmStatus	RW	Status of AF lens actuator
`0x8006 [1]`	AfmPosmin	RW	Lower limit of physical motion range of AF lens actuator
`0x8007 [1]`	AfmPosmax	RW	Upper limit of physical motion range of AF lens actuator
`0x8008 [1]`	AfmPosmacro	RW	Logical macro position of AF lens
`0x8009 [1]`	AfmBacklash	RW	Logical size of backlash-compensating step
`0x800a [1]`	AfmCustctrl	RW	Custom controls; their function depends on type of lens actuator used
`0x8017 [1]`	AfmTimerMaxquickmove	RW	Max. length of short lens move
`0x8018 [1]`	AfmTimerConfig	RW	Determines how AFM driver estimates time needed to move AF lens
`0x8021 [1]`	AfmSiNeedsack	RW	Switch enabling detection of slave ACK (0: disabled; 1:enabled)
`0x8022 [1]`	AfmSiSlaveaddr	RW	Slave address used in serial interface transmissions
`0x8025 [1]`	AfmSmDrv0mask	RW	Mask selecting 1st stepper-motor-driving output
`0x8026 [1]`	AfmSmDrv1mask	RW	Mask selecting 2nd stepper-motor-driving output
`0x8027 [1]`	AfmSmDrv2mask	RW	Mask selecting 3rd stepper-motor-driving output
`0x8028 [1]`	AfmSmDrv3mask	RW	Mask selecting 4th stepper-motor-driving output
`0x802b [1]`	AfmSmDrvsgenmode	RW	Controls generation of stepper-motor-driving waveforms by GPIO
`0x8030 [1]`	AfmSmPiedgeoffset	RW	Distance between PI signal edge and desired initial position of stepper motor
`0x8031 [1]`	AfmSmPiconfig	RW	Controls photointerrupter use in initial stepper motor positioning

MODE

Table 1.47. Address map MODE starting at absolute address 0x2700

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	ModeVmt	RW
`0x0003 [2]`	ModeOutputWidthA	RW
`0x0005 [2]`	ModeOutputHeightA	RW
`0x0007 [2]`	ModeOutputWidthB	RW
`0x0009 [2]`	ModeOutputHeightB	RW
`0x000b [2]`	ModeConfig	RW
`0x000d [2]`	ModePllLockDelay	RW
`0x000f [2]`	ModeSensorRowStartA	RW
`0x0011 [2]`	ModeSensorColStartA	RW
`0x0013 [2]`	ModeSensorRowHeightA	RW
`0x0015 [2]`	ModeSensorColWidthA	RW
`0x0017 [2]`	ModeSensorXDelayA	RW
`0x0019 [2]`	ModeSensorRowSpeedA	RW
`0x001b [2]`	ModeSensorRowStartB	RW
`0x001d [2]`	ModeSensorColStartB	RW
`0x001f [2]`	ModeSensorRowHeightB	RW
`0x0021 [2]`	ModeSensorColWidthB	RW
`0x0023 [2]`	ModeSensorXDelayB	RW
`0x0025 [2]`	ModeSensorRowSpeedB	RW
`0x0027 [2]`	ModeCropX0A	RW
`0x0029 [2]`	ModeCropX1A	RW
`0x002b [2]`	ModeCropY0A	RW
`0x002d [2]`	ModeCropY1A	RW
`0x002f [2]`	ModeDecCtrlA	RW
`0x0031 [2]`	ModeWidthRatioA	RW
`0x0033 [2]`	ModeHeightRatioA	RW
`0x0035 [2]`	ModeCropX0B	RW
`0x0037 [2]`	ModeCropX1B	RW
`0x0039 [2]`	ModeCropY0B	RW
`0x003b [2]`	ModeCropY1B	RW
`0x003d [2]`	ModeDecCtrlB	RW
`0x003f [2]`	ModeWidthRatioB	RW
`0x0041 [2]`	ModeHeightRatioB	RW
`0x006b [2]`	ModeFifoConf0A	RW
`0x006d [2]`	ModeFifoConf1A	RW
`0x0070 [2]`	ModeFifoLenTimingA	RW
`0x0072 [2]`	ModeFifoConf0B	RW
`0x0074 [2]`	ModeFifoConf1B	RW
`0x0077 [2]`	ModeFifoLenTimingB	RW
`0x0079 [2]`	ModeSpoofWidthB	RW
`0x007b [2]`	ModeSpoofHeightB	RW
`0x007f [2]`	ModeSpecEffectsA	RW
`0x0081 [2]`	ModeSpecEffectsB	RW
`0x8002 [1]`	ModeContext	RW
`0x8043 [1]`	ModeGamContA	RW
`0x8044 [1]`	ModeGamContB	RW
`0x8045 [1]`	ModeGamTableA0	RW
`0x8046 [1]`	ModeGamTableA1	RW
`0x8047 [1]`	ModeGamTableA2	RW
`0x8048 [1]`	ModeGamTableA3	RW
`0x8049 [1]`	ModeGamTableA4	RW
`0x804a [1]`	ModeGamTableA5	RW
`0x804b [1]`	ModeGamTableA6	RW
`0x804c [1]`	ModeGamTableA7	RW
`0x804d [1]`	ModeGamTableA8	RW
`0x804e [1]`	ModeGamTableA9	RW
`0x804f [1]`	ModeGamTableA10	RW
`0x8050 [1]`	ModeGamTableA11	RW
`0x8051 [1]`	ModeGamTableA12	RW
`0x8052 [1]`	ModeGamTableA13	RW
`0x8053 [1]`	ModeGamTableA14	RW
`0x8054 [1]`	ModeGamTableA15	RW
`0x8055 [1]`	ModeGamTableA16	RW
`0x8056 [1]`	ModeGamTableA17	RW
`0x8057 [1]`	ModeGamTableA18	RW
`0x8058 [1]`	ModeGamTableB0	RW
`0x8059 [1]`	ModeGamTableB1	RW
`0x805a [1]`	ModeGamTableB2	RW
`0x805b [1]`	ModeGamTableB3	RW
`0x805c [1]`	ModeGamTableB4	RW
`0x805d [1]`	ModeGamTableB5	RW
`0x805e [1]`	ModeGamTableB6	RW
`0x805f [1]`	ModeGamTableB7	RW
`0x8060 [1]`	ModeGamTableB8	RW
`0x8061 [1]`	ModeGamTableB9	RW
`0x8062 [1]`	ModeGamTableB10	RW
`0x8063 [1]`	ModeGamTableB11	RW
`0x8064 [1]`	ModeGamTableB12	RW
`0x8065 [1]`	ModeGamTableB13	RW
`0x8066 [1]`	ModeGamTableB14	RW
`0x8067 [1]`	ModeGamTableB15	RW
`0x8068 [1]`	ModeGamTableB16	RW
`0x8069 [1]`	ModeGamTableB17	RW
`0x806a [1]`	ModeGamTableB18	RW
`0x806f [1]`	ModeFifoConf2A	RW
`0x8076 [1]`	ModeFifoConf2B	RW
`0x807d [1]`	ModeOutputFormatA	RW
`0x807e [1]`	ModeOutputFormatB	RW
`0x8083 [1]`	ModeYRgbOffsetA	RW
`0x8084 [1]`	ModeYRgbOffsetB	RW

JPEG

Table 1.48. Address map JPEG starting at absolute address 0x2900

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	JpegVmt	RW
`0x0002 [2]`	JpegWidth	RW
`0x0004 [2]`	JpegHeight	RW
`0x0008 [2]`	JpegRestartInt	RW
`0x0010 [2]`	JpegDatalenLsbs	RW
`0x8006 [1]`	JpegFormat	RW
`0x8007 [1]`	JpegConfig	RW
`0x800a [1]`	JpegQscale1	RW
`0x800b [1]`	JpegQscale2	RW
`0x800c [1]`	JpegQscale3	RW
`0x800d [1]`	JpegTimeoutframes	RW
`0x800e [1]`	JpegStatus	RW
`0x800f [1]`	JpegDatalenMsb	RW

HG

Table 1.49. Address map HG starting at absolute address 0x2b00

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	HgVmt	RW
`0x000b [2]`	HgDlevelBuf	RW
`0x000f [2]`	HgPositionHi	RO
`0x8002 [1]`	HgDlevelBufferspeed	RW
`0x8003 [1]`	HgScaleGfactor	RW
`0x8004 [1]`	HgMaxDlevel	RW
`0x8005 [1]`	HgPercent	RW
`0x8006 [1]`	HgLowerLimit1	RW
`0x8007 [1]`	HgBinsize1	RW
`0x8008 [1]`	HgLowerLimit2	RW
`0x8009 [1]`	HgBinsize2	RW
`0x800a [1]`	HgDlevel	RW
`0x800d [1]`	HgFactorHi	RW	Factor of overexposure compensation for metering mode
`0x800e [1]`	HgPercentHi	RW	Highlight clipping 255 is 100%

Detailed register description

Table 1.50. PixclkSpeedCtrl (Address: 0x000a)

Bit(s)	Name	Description
14:15	`BITS_14_15`
13:13	`BIT_13`
8:8	`PIXCLK_INVERT`
4:7	`PIXCLK_DELAY`	In half mclk compared to internal pixclk
3:3	`BIT_3`
0:2	`PIXCLK_SPEED`	1ADC: Pclk = 2 mclks* bits[0:2]; 2ADC: bits[0:2]

Table 1.51. Reset (Address: 0x000d)

Bit(s)	Name	Description
15:15	`SYNC_CHANGES`
10:10	`TOGGLE_SADDR`	0: SHIP wired address [usually 0xBA]; 1: Alternate SHIP address [usually 0x90]
9:9	`RESTART_FRAMES`
8:8	`SHOW_BAD_FRAMES`	0: only good frames; 1: all frames
7:7	`INHIBIT_STANDBY`	0: standby pin causes standby; 1: standby pin does not cause standby
6:6	`DRIVE_PINS`	0: pins can go high impedance in standby; 1: pins driven in standby
5:5	`SOC_RESET`	0: Resume, 1: Reset
4:4	`SENSOR_DISABLE`
3:3	`BIT_3`
2:2	`STANDBY`	Software equivalent of standby pin
1:1	`RESTART`
0:0	`RESET`	0: Resume, 1: Reset

Table 1.52. FrameValidControl (Address: 0x001f)

Bit(s)	Name	Description
15:15	`EN_EARLY_FV_FALL`
8:14	`EARLY_FV_FALL`
7:7	`EN_EARLY_FV_RISE`
0:6	`EARLY_FV_RISE`

Table 1.53. ReadModeB (Address: 0x0020)

Bit(s)	Name	Description
15:15	`BIN_EN`	1: 2x2 Binning enabled
13:13	`ZOOM_EN`	0: No zoom; 1: Zoom enabled
11:12	`ZOOM`	0: by 2; 1: by 4; 2: by 8; 3: by 16
10:10	`POWER_MODE`	1: Use 1 ADC
9:9	`SHOW_BORDER`	0: Do not put oversized border in image; 1: Do show border
8:8	`OVER_SIZED`	0: normal; 1: 4 border pixel around image
7:7	`COLUMN_SKIP_EN`	0: No skip; 1: Skip enabled
5:6	`COLUMN_SKIP`	0: Skip by 2; 1: Skip by 4; 2: Skip by 8; 3: Skip by 16
4:4	`ROW_SKIP_EN`	0: No skip; 1: Skip enabled
2:3	`ROW_SKIP`	0: Skip by 2; 1: Skip by 4; 2: Skip by 8; 3: Skip by 16
1:1	`READ_MODE_REG_LEFT_RT`	0: Sensor reads right to left, 1: Left to right
0:0	`READ_MODE_REG_BOT_TOP`	0: Sensor reads top to bottom, 1: Bottom to top

Table 1.54. ReadModeA (Address: 0x0021)

Bit(s)	Name	Description
15:15	`BIN_EN`	1: 2x2 Binning enabled
10:10	`POWER_MODE`	1: Use 1 ADC
7:7	`COLUMN_SKIP_EN`	0: No skip; 1: Skip enabled
5:6	`COLUMN_SKIP`	0: Skip by 2; 1: Skip by 4; 2: Skip by 8; 3: Skip by 16
4:4	`ROW_SKIP_EN`	0: No skip; 1: Skip enabled
2:3	`ROW_SKIP`	0: Skip by 2; 1: Skip by 4; 2: Skip by 8; 3: Skip by 16

Table 1.55. DarkRowsCols (Address: 0x0022)

Bit(s)	Name	Description
10:10	`DARK_COLS_NUM`	0: 20 columns, 1: 36 columns
9:9	`DARK_COLS_SHOW`
8:8	`DARK_COLS_ENABLE`
7:7	`DARK_ROWS_SHOW`
4:6	`DARK_ROWS_START`
3:3	`BIT_3`	Not in use.
0:2	`DARK_ROWS_NUM`

Table 1.56. FlashControl (Address: 0x0023)

Bit(s)	Name	Description
15:15	`FLASH_STROBE`	Whether flash_strobe pin is enabled
14:14	`FLASH_TRIGGERED`
13:13	`ENABLE_XENON`
11:12	`FLASH_FRAME_DELAY`
10:10	`FLASH_END_OF_RESET`
9:9	`FLASH_EVERY_FRAME`
8:8	`ENABLE_LED`
0:7	`XENON_COUNT`	multiplied by 1024 mclks

Table 1.57. ExtraReset (Address: 0x0024)

Bit(s)	Name	Description
15:15	`EXTRA_RST_EN`
14:14	`NXT_ROW_RST`

Table 1.58. LineValidControl (Address: 0x0025)

Bit(s)	Name	Description
15:15	`XOR_LINE_VALID`	1: line_valid signal is xor between frame_valid and continuous line valid
14:14	`LINE_VALID`	1: Produce Line Valid during Vertical Blank

Table 1.59. DarkRowsBottom (Address: 0x8026)

Bit(s)	Name	Description
7:7	`DARK_ROWS_SHOW`
4:6	`DARK_ROWS_START`
3:3	`DARK_ROWS_ENABLE`
0:2	`DARK_ROWS_NUM`

Table 1.60. Green1Gain (Address: 0x002b)

Bit(s)	Name	Description
11:11	`GREEN1_GAIN_DOUBLE_5`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
10:10	`GREEN1_GAIN_DOUBLE_4`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
9:9	`GREEN1_GAIN_DOUBLE_3`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
8:8	`GREEN1_GAIN_DOUBLE_2`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
7:7	`GREEN1_GAIN_DOUBLE_1`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
0:6	`GREEN1_GAIN_VALUE`	Initial Gain =bits[6:0] * 0.03125

Table 1.61. BlueGain (Address: 0x002c)

Bit(s)	Name	Description
11:11	`BLUE_GAIN_DOUBLE_5`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
10:10	`BLUE_GAIN_DOUBLE_4`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
9:9	`BLUE_GAIN_DOUBLE_3`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
8:8	`BLUE_GAIN_DOUBLE_2`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
7:7	`BLUE_GAIN_DOUBLE_1`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
0:6	`BLUE_GAIN_VALUE`	Initial Gain =bits[6:0] * 0.03125

Table 1.62. RedGain (Address: 0x002d)

Bit(s)	Name	Description
11:11	`RED_GAIN_DOUBLE_5`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
10:10	`RED_GAIN_DOUBLE_4`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
9:9	`RED_GAIN_DOUBLE_3`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
8:8	`RED_GAIN_DOUBLE_2`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
7:7	`RED_GAIN_DOUBLE_1`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
0:6	`RED_GAIN_VALUE`	Initial Gain =bits[6:0] * 0.03125

Table 1.63. Green2Gain (Address: 0x002e)

Bit(s)	Name	Description
11:11	`GREEN2_GAIN_DOUBLE_5`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
10:10	`GREEN2_GAIN_DOUBLE_4`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
9:9	`GREEN2_GAIN_DOUBLE_3`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
8:8	`GREEN2_GAIN_DOUBLE_2`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
7:7	`GREEN2_GAIN_DOUBLE_1`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
0:6	`GREEN2_GAIN_VALUE`	Initial Gain =bits[6:0] * 0.03125

Table 1.64. GlobalGain (Address: 0x002f)

Bit(s)	Name	Description
11:11	`GLOBAL_GAIN_DOUBLE_5`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
10:10	`GLOBAL_GAIN_DOUBLE_4`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
9:9	`GLOBAL_GAIN_DOUBLE_3`	Total Gain = [Bit9 +1][Bit10 +1][Bit11 +1]*Analog Gain
8:8	`GLOBAL_GAIN_DOUBLE_2`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
7:7	`GLOBAL_GAIN_DOUBLE_1`	Analog Gain = [Bit8 +1][Bit7 +1]Initial Gain
0:6	`GLOBAL_GAIN_VALUE`	Initial Gain =bits[6:0] * 0.03125

Table 1.65. RowNoiseControl (Address: 0x0030)

Bit(s)	Name	Description
15:15	`EN_FRAME_CORRECTION`
12:14	`GAIN_THRESHOLD`
11:11	`USE_BL_AVG`
10:10	`EN_CORRECTION`
0:9	`ROW_NOISE_CONSTANT`

Table 1.66. BlackRows (Address: 0x8059)

Bit(s)	Name	Description
7:7	`BLACK_ROW_7`
6:6	`BLACK_ROW_6`
5:5	`BLACK_ROW_5`
4:4	`BLACK_ROW_4`
3:3	`BLACK_ROW_3`
2:2	`BLACK_ROW_2`
1:1	`BLACK_ROW_1`
0:0	`BLACK_ROW_0`

Table 1.67. CalThreshold (Address: 0x005f)

Bit(s)	Name	Description
8:14	`CAL_THRESHOLD_MAX`	Maximum allowed black level in ADC LSBs
0:6	`CAL_THRESHOLD_MIN`	Lower threshold for black level in ADC LSBs

Table 1.68. CalCtrl (Address: 0x0060)

Bit(s)	Name	Description
15:15	`CAL_DIS_RAP_SWEEP_MODE`
12:12	`CAL_RECALC`
10:10	`BIT_10`
9:9	`BIT_9`
8:8	`CAL_SWEEP_MODE`
5:7	`CAL_N_FRAMES`	in power of 2s
4:4	`CAL_STEP_IS_1`
3:3	`CAL_SWITCH_CALIB`
2:2	`CAL_SAME_BLUERED`
1:1	`CAL_SAME_GREEN`
0:0	`CAL_CTRL_AUTO`	1: Override auto black level correction w/ programmed values

Table 1.69. ClockEnabling (Address: 0x0065)

Bit(s)	Name	Description
15:15	`PLL_BYPASS`	0: use PLL clk as mclk; 1: Bypass PLL
14:14	`PLL_PD`	0: PLL is active; 1: Keep pll in Powerdown
13:13	`BIT_13`
3:3	`CLOCK_CTRL_BIT_3`	0: Default; 1: Continuous black level calib. clock
2:2	`CLOCK_CTRL_BIT_2`	0: Default; 1: Continuous new row clock
1:1	`CLOCK_CTRL_BIT_1`	0: Default; 1: Continuous new frame clock
0:0	`CLOCK_CTRL_BIT_0`	0: Default; 1: continous SHIP clock

Table 1.70. Pll (Address: 0x0066)

Bit(s)	Name	Description
8:15	`PLL_M`
0:5	`PLL_N`

Table 1.71. Pll2 (Address: 0x0067)

Bit(s)	Name	Description
8:11	`PLL_PFD`
0:6	`PLL_P`

Table 1.72. GrstControl (Address: 0x00c0)

Bit(s)	Name	Description
15:15	`GRST_EN`
2:2	`FLASH_CTRL`
1:1	`STROBE_CTRL`
0:0	`READOUT_CTRL`

Table 1.73. ExtsampCtr (Address: 0x00e3)

Bit(s)	Name	Description
15:15	`EN_SAMP`	0: Disable external sampling; 1: Enable
14:14	`SHOW_SAMP`	0: No samples; 1: Show samples if LV low

Table 1.74. ContextControl (Address: 0x00f2)

Bit(s)	Name	Description
15:15	`RESTART`
7:7	`ARM_XENON_FLASH`
3:3	`READ_MODE_CONTEXT`	0: Context A [Reg 0x21]; 1: Context B [Reg 0x20]
2:2	`LED_FLASH_ON`
1:1	`VBLANK_SELECT`	0: Context A [Reg 0x8]; 1: Context B [Reg 0x6]
0:0	`HBLANK_SELECT`	0: Context A [Reg 0x7]; 1: Context B [Reg 0x5]

Table 1.75. GpioWgConfig (Address: 0x80b0)

Bit(s)	Name	Description
4:7	`EN_16BIT_COUNTER`	Enable in 16-bit Counter Mode
0:3	`EN_8BIT_COUNTER`	Enable in 8-bit Counter Mode

Table 1.76. GpioWgClkdiv (Address: 0x80b2)

Bit(s)	Name	Description
4:7	`WG_CLKDIV_2`	Divide by 2^(n+1)
0:3	`WG_CLKDIV_1`	Divide by 2^(n+1)

Table 1.77. SeqMode (Address: 0x8002)

Bit(s)	Name	Description
6:7	`BITS_5_7`
5:5	`6500K_OUTDOOR_WB`
4:4	`AF`	ID=5
3:3	`HG`	ID=11
2:2	`AWB`	ID=3
1:1	`FD`	ID=4
0:0	`AE`	ID=2

Table 1.78. SeqStepmode (Address: 0x8005)

Bit(s)	Name	Description
1:1	`FORCE_NEXT_STEP`
0:0	`ON_OFF`	1-On

Table 1.79. SeqFlashtype (Address: 0x8006)

Bit(s)	Name	Description
7:7	`FLASH_ON_LOCK`
0:6	`FLASHTYPE`	0-None;1-LED;2-Xenon;3-XenonBurst

Table 1.80. SeqResetLevelTh (Address: 0x800f)

Bit(s)	Name	Description
4:7	`CLIP_LEVEL_LT_32`
0:3	`CLIP_LEVEL_GE_32`

Table 1.81. SeqLlmode (Address: 0x8015)

Bit(s)	Name	Description
6:6	`RESET_CLIP_LEVEL`
5:5	`TXBOOST_VS_GAINS`
4:4	`Y_FILTER_ON`
3:3	`INCR_AP_THRESH`
2:2	`REDUCE_AP_CORR`
1:1	`REDUCE_SATURATION`
0:0	`CHANGE_INTERP_THRESH`

Table 1.82. SeqCapMode (Address: 0x8020)

Bit(s)	Name	Description
6:6	`VIDEO_HG_ON`	Video Only
5:5	`VIDEO_AWB_ON`	Video Only
4:4	`VIDEO_AE_ON`	Video Only
3:3	`VIDEO_AF_ON`	Video Only
2:2	`BIT_2`
1:1	`VIDEO`
0:0	`XENON_FLASH`	Still Only

Table 1.83. SeqPreview0Skipframe (Address: 0x8028)

Bit(s)	Name	Description
7:7	`TURN_OFF_FEN`
6:6	`SKIP_STATE`
5:5	`SKIP_LED_ON`

Table 1.84. SeqPreview1Skipframe (Address: 0x802f)

Bit(s)	Name	Description
7:7	`TURN_OFF_FEN`
6:6	`SKIP_STATE`
5:5	`SKIP_LED_ON`

Table 1.85. SeqPreview2Skipframe (Address: 0x8036)

Bit(s)	Name	Description
7:7	`TURN_OFF_FEN`
6:6	`SKIP_STATE`
5:5	`SKIP_LED_ON`

Table 1.86. SeqPreview3Skipframe (Address: 0x803d)

Bit(s)	Name	Description
7:7	`TURN_OFF_FEN`
6:6	`SKIP_STATE`
5:5	`SKIP_LED_ON`

Table 1.87. ColorPipelineControl (Address: 0x0008)

Bit(s)	Name	Description
10:10	`ENABLE_1D_APERTURE_CORRECTION`
9:9	`MINBLANK`
8:8	`DECIMATOR`
7:7	`GAMMA_CORRECTION`
6:6	`INVERT_PIXEL_CLOCK`
5:5	`COLOR_CORRECTION`
4:4	`ENABLE_2D_APERTURE_CORRECTION`
3:3	`DEFECT_CORRECTION`
2:2	`LENS_SHADING`
1:1	`VERTICAL_SHIFT`
0:0	`HORIZONTAL_SHIFT`

Table 1.88. FactoryBypass (Address: 0x8009)

Bit(s)	Name	Description
3:4	`GPIO_OUTPUT_BYPASS`
0:2	`DATA_OUTPUT_BYPASS`	0: 10bit; 1: SOC; 2: JPEG; 3: Constant

Table 1.89. PadSlew (Address: 0x000a)

Bit(s)	Name	Description
8:10	`SDATA_SLEW_RATE`
7:7	`BIT_7`
4:6	`GPIO_SLEW_RATE`
0:2	`SLEW_RATE`

Table 1.90. InternalClockControl (Address: 0x000b)

Bit(s)	Name	Description
8:8	`BIT_8`
7:7	`GPIO_CLOCK`
6:6	`BIT_6`
5:5	`BIT_5`
4:4	`JPEG_CLOCK`
3:3	`OUTPUT_FIFO_CLOCK`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.91. DecimatorControl (Address: 0x0015)

Bit(s)	Name	Description
6:6	`BIT_6`
5:5	`BIT_5`
4:4	`EN_4_2_0`
3:3	`BIT_3`
2:2	`HIGH_PRECISION`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.92. LumLimitsWbStats (Address: 0x0020)

Bit(s)	Name	Description
8:15	`LUM_UPPER_LIMIT`
0:7	`LUM_LOWER_LIMIT`

Table 1.93. RightLeftCoordsAwbWindow (Address: 0x002d)

Bit(s)	Name	Description
8:15	`RIGHT`
0:7	`LEFT`

Table 1.94. BottomTopCoordsAwbWindow (Address: 0x002e)

Bit(s)	Name	Description
8:15	`BOTTOM`
0:7	`TOP`

Table 1.95. _1dApertureParameters (Address: 0x0035)

Bit(s)	Name	Description
11:13	`EXP`
8:10	`GAIN`
0:7	`KNEE`

Table 1.96. ApertureParameters (Address: 0x0036)

Bit(s)	Name	Description
14:14	`BIT_14`
11:13	`EXP`	exponent for gain for aperture signal
8:10	`GAIN`	gain for aperture signal
0:7	`KNEE`	threshold for aperture signal

Table 1.97. Filters (Address: 0x8037)

Bit(s)	Name	Description
7:7	`BIT_7`
6:6	`BIT_6`
5:5	`ENABLE_Y_FILTER`
3:4	`Y`
0:2	`UV`

Table 1.98. TestPattern (Address: 0x8048)

Bit(s)	Name	Description
4:4	`ODDEVEN_ROW`
3:3	`ODDEVEN_COL`
0:2	`TEST_MODE`

Table 1.99. ColorCorrMatrix12 (Address: 0x0062)

Bit(s)	Name	Description
8:15	`ELEMENT_2`
0:7	`ELEMENT_1`

Table 1.100. ColorCorrMatrix34 (Address: 0x0063)

Bit(s)	Name	Description
8:15	`ELEMENT_4`
0:7	`ELEMENT_3`

Table 1.101. ColorCorrMatrix56 (Address: 0x0064)

Bit(s)	Name	Description
8:15	`ELEMENT_6`
0:7	`ELEMENT_5`

Table 1.102. ColorCorrMatrix78 (Address: 0x0065)

Bit(s)	Name	Description
8:15	`ELEMENT_8`
0:7	`ELEMENT_7`

Table 1.103. ColorCorrMatrix9 (Address: 0x0066)

Bit(s)	Name	Description
8:13	`SIGNS`
0:7	`ELEMENT_9`

Table 1.104. BoundsFdWindowLeftWidth (Address: 0x007a)

Bit(s)	Name	Description
8:15	`LEFT`
0:7	`WIDTH`

Table 1.105. BoundsFdWindowTopHeight (Address: 0x007b)

Bit(s)	Name	Description
6:15	`TOP`
0:5	`HEIGHT`

Table 1.106. OutputFormatConfig (Address: 0x8097)

Bit(s)	Name	Description
6:7	`RGB_FORMAT`	0: 565; 1: 555; 2: 444x; 3: x444
5:5	`OUTPUT_MODE`	0: YUV; 1: RGB
4:4	`CCIR656`
3:3	`MONOCHROME`
2:2	`BIT_2`
1:1	`SWAP_CHROMINANCE_LUMA`
0:1	`ORDER`	swaps Cb Cr in YUV and R B in RGB
0:0	`SWAP_CHANNELS`	swaps Cb Cr in YUV and R B in RGB

Table 1.107. OutputFormatTest (Address: 0x8098)

Bit(s)	Name	Description
7:7	`FREEZE`
6:6	`BYPASS_8_2`
3:5	`RAMP`
2:2	`CB`
1:1	`Y`
0:0	`CR`

Table 1.108. SpecialEffects (Address: 0x00a4)

Bit(s)	Name	Description
8:15	`SOLARIZATION_THRESH`
6:6	`DITHER_LUMA`	0 = dither in all color channels; 1 = luma only
3:5	`DITHER_BITWIDTH`	Valid values 1-4 otherwise no dither
0:2	`SELECTION`	0: disabled 1: mono; 2: sepia; 3: negative; 4: solarization 5: solarization w/ UV

Table 1.109. SepiaConstants (Address: 0x00a5)

Bit(s)	Name	Description
8:15	`CB`
0:7	`CR`

Table 1.110. GammaCurveKnees01 (Address: 0x00b2)

Bit(s)	Name	Description
8:15	`KNEE_1`
0:7	`KNEE_0`

Table 1.111. GammaCurveKnees23 (Address: 0x00b3)

Bit(s)	Name	Description
8:15	`KNEE_3`
0:7	`KNEE_2`

Table 1.112. GammaCurveKnees45 (Address: 0x00b4)

Bit(s)	Name	Description
8:15	`KNEE_5`
0:7	`KNEE_4`

Table 1.113. GammaCurveKnees67 (Address: 0x00b5)

Bit(s)	Name	Description
8:15	`KNEE_7`
0:7	`KNEE_6`

Table 1.114. GammaCurveKnees89 (Address: 0x00b6)

Bit(s)	Name	Description
8:15	`KNEE_9`
0:7	`KNEE_8`

Table 1.115. GammaCurveKnees1011 (Address: 0x00b7)

Bit(s)	Name	Description
8:15	`KNEE_11`
0:7	`KNEE_10`

Table 1.116. GammaCurveKnees1213 (Address: 0x00b8)

Bit(s)	Name	Description
8:15	`KNEE_13`
0:7	`KNEE_12`

Table 1.117. GammaCurveKnees1415 (Address: 0x00b9)

Bit(s)	Name	Description
8:15	`KNEE_15`
0:7	`KNEE_14`

Table 1.118. GammaCurveKnees1617 (Address: 0x00ba)

Bit(s)	Name	Description
8:15	`KNEE_17`
0:7	`KNEE_16`

Table 1.119. YuvYcbcrControl (Address: 0x80be)

Bit(s)	Name	Description
3:3	`CLIP`
2:2	`ADD_128`
1:1	`COEFF_CONTROL`
0:0	`MULT_Y_UV`

Table 1.120. YRgbOffset (Address: 0x00bf)

Bit(s)	Name	Description
8:15	`Y_OFFSET`
0:7	`RGB_OFFSET`

Table 1.121. McuBootMode (Address: 0x00c3)

Bit(s)	Name	Description
15:15	`BIT_15`
14:14	`BIT_14`
13:13	`BIT_13`
12:12	`BIT_12`
8:11	`BITS_8_11`
7:7	`MCU_DEBUG_INDICATOR`
5:6	`BITS_5_6`
4:4	`BIT_4`
3:3	`BIT_3`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`RESET_MCU`

Table 1.122. McuAddress (Address: 0x00c6)

Bit(s)	Name	Description
15:15	`8_BIT`	1=8-bit access; 0=16-bit
13:14	`SELECT_LOGICAL_ACCESS`
8:12	`DRIVER_ID`
0:7	`DRIVER_VARIABLE`	driver variable offset for logical access

Table 1.123. AeWeights (Address: 0x8019)

Bit(s)	Name	Description
4:7	`BACKGROUND_WEIGHT`
0:3	`CENTER_ZONE_WEIGHT`

Table 1.124. AeStatus (Address: 0x801a)

Bit(s)	Name	Description
7:7	`OVEREXPOSE_COMP`
6:6	`OVEREXPOSE_FIX`
4:4	`METERING_DONE`
3:3	`METERING_MODE`
2:2	`READY`
1:1	`R9_CHANGED`	1- Need to skip frame
0:0	`AE_AT_LIMIT`	1- AE reached limit

Table 1.125. JpegControl (Address: 0x0000)

Bit(s)	Name	Description
15:15	`SOFT_RESET`
2:14	`RETURN_ZERO`
1:1	`TEST_RAM`
0:0	`ENABLE_ENCODER`

Table 1.126. JpegStatus0 (Address: 0x0002)

Bit(s)	Name	Description
8:15	`JPEG_DATA_LENGTH_MSB`
6:7	`QTABLE_ID`	0: Pair0 1:Pair1 2: Pair2 3:Reserved
4:5	`WATERMARK`	0:25% 1:50% 2:75% 3:100%
3:3	`REORDER_ERROR`
2:2	`SPOOF_OVERSIZE_ERR`	Write 1 to clear
1:1	`OUT_BUF_OVERFLOW`	Write 1 to clear
0:0	`TRANSFER_DONE`	Write 1 to clear

Table 1.127. JpegConfigFe (Address: 0x8005)

Bit(s)	Name	Description
2:5	`BITS_2_5`
1:1	`MONOCHROME_MODE`
0:0	`ENCODED_DATA_FORMAT`

Table 1.128. JpegConfigOutput0 (Address: 0x000d)

Bit(s)	Name	Description
11:11	`FREEZE_UPDATE_JPEG`
10:10	`EN_SPOOF_CCIR_CODES`
9:9	`SIG_ABNORMAL_TERMINATION`
8:8	`DUP_FV_ON_LV`
7:7	`EN_BYTE_SWAP`	Spoof frame must be enabled [bit 0 = 1]
6:6	`EN_VAR_CLK_OUT_RATE`
5:5	`IGNORE_SPOOF_HEIGHT`
4:4	`SOI_EOI_IN_FV`
3:3	`EN_SOI_EOI`
2:2	`EN_CLK_OUT_INVALID_DATA`
1:1	`EN_CLK_OUT_BETWEEN_FRAMES`
0:0	`EN_SPOOF_FRAME`

Table 1.129. JpegConfigOutput1 (Address: 0x000e)

Bit(s)	Name	Description
13:15	`PAD_SLEW_N2`	Used when output buffer is 50%-75% full
12:12	`BIT_12`
8:11	`MCLK_DIV_N2`	Used when output buffer is 50%-75% full
5:7	`PAD_SLEW_N1`	Used when output buffer is <50% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N1`	Used when output buffer is <50% full

Table 1.130. JpegConfigOutput2 (Address: 0x800f)

Bit(s)	Name	Description
5:7	`PAD_SLEW_N3`	Used when output buffer is >75% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N3`	Used when output buffer is >75% full

Table 1.131. JpegSpoofLvTiming (Address: 0x0012)

Bit(s)	Name	Description
8:15	`SPOOF_LV_TRAIL`
0:7	`SPOOF_LV_LEAD`

Table 1.132. JpegRamTestCtrl (Address: 0x001d)

Bit(s)	Name	Description
15:15	`TEST_RAM_WR_EN`
14:14	`TEST_RAM_OUT_BUF`	This supersedes Y/C RAM selection
13:13	`TEST_RAM_Y1_OR_C0`
10:12	`TEST_RAM_YC_SEL`
0:9	`TEST_RAM_ADDR`

Table 1.133. JpegIndirectRegCtrl (Address: 0x001e)

Bit(s)	Name	Description
15:15	`INDIRECT_REG_AI_EN`
14:14	`INDIRECT_REG_WR_EN`
13:13	`ENABLE_SHIP_BURST`
11:12	`BITS_11_12`
0:10	`INDIRECT_REG_ADDR`

Table 1.134. BoundsFirstAfWindTopLeft (Address: 0x0040)

Bit(s)	Name	Description
8:15	`TOP`
0:7	`LEFT`

Table 1.135. BoundsAfWindHeightWidth (Address: 0x0041)

Bit(s)	Name	Description
8:15	`HEIGHT`
0:7	`WIDTH`

Table 1.136. AvgLuminanceW11W12 (Address: 0x0043)

Bit(s)	Name	Description
8:15	`Y_W12`
0:7	`Y_W11`

Table 1.137. AvgLuminanceW13W14 (Address: 0x0044)

Bit(s)	Name	Description
8:15	`Y_W14`
0:7	`Y_W13`

Table 1.138. AvgLuminanceW21W22 (Address: 0x0045)

Bit(s)	Name	Description
8:15	`Y_W22`
0:7	`Y_W21`

Table 1.139. AvgLuminanceW23W24 (Address: 0x0046)

Bit(s)	Name	Description
8:15	`Y_W24`
0:7	`Y_W23`

Table 1.140. AvgLuminanceW31W32 (Address: 0x0047)

Bit(s)	Name	Description
8:15	`Y_W32`
0:7	`Y_W31`

Table 1.141. AvgLuminanceW33W34 (Address: 0x0048)

Bit(s)	Name	Description
8:15	`Y_W34`
0:7	`Y_W33`

Table 1.142. AvgLuminanceW41W42 (Address: 0x0049)

Bit(s)	Name	Description
8:15	`Y_W42`
0:7	`Y_W41`

Table 1.143. AvgLuminanceW43W44 (Address: 0x004a)

Bit(s)	Name	Description
8:15	`Y_W44`
0:7	`Y_W43`

Table 1.144. AfFilter1 (Address: 0x004b)

Bit(s)	Name	Description
12:15	`C4`
8:11	`C3`
4:7	`C2`
0:3	`C1`

Table 1.145. AfFilter1Parameters (Address: 0x004c)

Bit(s)	Name	Description
12:15	`C0_COEFF`	for the center tap in odd-sized filter
10:10	`C4_SIGN`	1=negative 0=positive
9:9	`C3_SIGN`	1=negative 0=positive
8:8	`C2_SIGN`	1=negative 0=positive
7:7	`C1_SIGN`	1=negative 0=positive
6:6	`C0_SIGN`	1=negative 0=positive
5:5	`SYMMETRIC`	0: anti-symmetric; 1: symmetric
4:4	`ODD_EVEN_FILTER_SIZE`	0: even length; 1: odd length
0:3	`SCALE_FACTOR`

Table 1.146. AvgSharpness1W11W12 (Address: 0x004d)

Bit(s)	Name	Description
8:15	`W12`
0:7	`W11`

Table 1.147. AvgSharpness1W13W14 (Address: 0x004e)

Bit(s)	Name	Description
8:15	`W14`
0:7	`W13`

Table 1.148. AvgSharpness1W21W22 (Address: 0x004f)

Bit(s)	Name	Description
8:15	`W22`
0:7	`W21`

Table 1.149. AvgSharpness1W23W24 (Address: 0x0050)

Bit(s)	Name	Description
8:15	`W24`
0:7	`W23`

Table 1.150. AvgSharpness1W31W32 (Address: 0x0051)

Bit(s)	Name	Description
8:15	`W32`
0:7	`W31`

Table 1.151. AvgSharpness1W33W34 (Address: 0x0052)

Bit(s)	Name	Description
8:15	`W34`
0:7	`W33`

Table 1.152. AvgSharpness1W41W42 (Address: 0x0053)

Bit(s)	Name	Description
8:15	`W42`
0:7	`W41`

Table 1.153. AvgSharpness1W43W44 (Address: 0x0054)

Bit(s)	Name	Description
8:15	`W44`
0:7	`W43`

Table 1.154. AfFilter2 (Address: 0x0055)

Bit(s)	Name	Description
12:15	`C4`
8:11	`C3`
4:7	`C2`
0:3	`C1`

Table 1.155. AfFilter2Parameters (Address: 0x0056)

Bit(s)	Name	Description
12:15	`C0_COEFF`	for the center tap in odd-sized filter
10:10	`C4_SIGN`	1=negative 0=positive
9:9	`C3_SIGN`	1=negative 0=positive
8:8	`C2_SIGN`	1=negative 0=positive
7:7	`C1_SIGN`	1=negative 0=positive
6:6	`C0_SIGN`	1=negative 0=positive
5:5	`SYMMETRIC`	0: anti-symmetric; 1: symmetric
4:4	`ODD_EVEN_FILTER_SIZE`	0: even length; 1: odd length
0:3	`SCALE_FACTOR`

Table 1.156. AvgSharpness2W11W12 (Address: 0x0057)

Bit(s)	Name	Description
8:15	`W12`
0:7	`W11`

Table 1.157. AvgSharpness2W13W14 (Address: 0x0058)

Bit(s)	Name	Description
8:15	`W14`
0:7	`W13`

Table 1.158. AvgSharpness2W21W22 (Address: 0x0059)

Bit(s)	Name	Description
8:15	`W22`
0:7	`W21`

Table 1.159. AvgSharpness2W23W24 (Address: 0x005a)

Bit(s)	Name	Description
8:15	`W24`
0:7	`W23`

Table 1.160. AvgSharpness2W31W32 (Address: 0x005b)

Bit(s)	Name	Description
8:15	`W32`
0:7	`W31`

Table 1.161. AvgSharpness2W33W34 (Address: 0x005c)

Bit(s)	Name	Description
8:15	`W34`
0:7	`W33`

Table 1.162. AvgSharpness2W41W42 (Address: 0x005d)

Bit(s)	Name	Description
8:15	`W42`
0:7	`W41`

Table 1.163. AvgSharpness2W43W44 (Address: 0x005e)

Bit(s)	Name	Description
8:15	`W44`
0:7	`W43`

Table 1.164. LensCorrectionControl (Address: 0x0080)

Bit(s)	Name	Description
10:10	`SHIFT_ROW`
9:9	`SHIFT_COL`
6:8	`DIVISOR_DERIV_1_Y`	0:/1 1:/2 2:/4 7:/128
3:5	`DIVISOR_DERIV_1_X`	0:/1 1:/2 2:/4 7-/128.
2:2	`Y_DOUBLED`
1:1	`X_DOUBLED`
0:0	`SIGN`

Table 1.165. ZoneBoundsX1X2 (Address: 0x0081)

Bit(s)	Name	Description
8:15	`X1`
0:7	`X2`

Table 1.166. ZoneBoundsX0X3 (Address: 0x0082)

Bit(s)	Name	Description
8:15	`X3`
0:7	`X0`

Table 1.167. ZoneBoundsX4X5 (Address: 0x0083)

Bit(s)	Name	Description
8:15	`X5`
0:7	`X4`

Table 1.168. ZoneBoundsY1Y2 (Address: 0x0084)

Bit(s)	Name	Description
8:15	`Y1`
0:7	`Y2`

Table 1.169. ZoneBoundsY0Y3 (Address: 0x0085)

Bit(s)	Name	Description
8:15	`Y3`
0:7	`Y0`

Table 1.170. ZoneBoundsY4Y5 (Address: 0x0086)

Bit(s)	Name	Description
8:15	`Y5`
0:7	`Y4`

Table 1.171. CenterOffset (Address: 0x0087)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.172. SecondDerivZone0Red (Address: 0x0094)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.173. SecondDerivZone0Green (Address: 0x0095)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.174. SecondDerivZone0Blue (Address: 0x0096)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.175. SecondDerivZone1Red (Address: 0x0097)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.176. SecondDerivZone1Green (Address: 0x0098)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.177. SecondDerivZone1Blue (Address: 0x0099)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.178. SecondDerivZone2Red (Address: 0x009a)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.179. SecondDerivZone2Green (Address: 0x009b)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.180. SecondDerivZone2Blue (Address: 0x009c)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.181. SecondDerivZone3Red (Address: 0x009d)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.182. SecondDerivZone3Green (Address: 0x009e)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.183. SecondDerivZone3Blue (Address: 0x009f)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.184. SecondDerivZone4Red (Address: 0x00a0)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.185. SecondDerivZone4Green (Address: 0x00a1)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.186. SecondDerivZone4Blue (Address: 0x00a2)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.187. SecondDerivZone5Red (Address: 0x00a3)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.188. SecondDerivZone5Green (Address: 0x00a4)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.189. SecondDerivZone5Blue (Address: 0x00a5)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.190. SecondDerivZone6Red (Address: 0x00a6)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.191. SecondDerivZone6Green (Address: 0x00a7)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.192. SecondDerivZone6Blue (Address: 0x00a8)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.193. SecondDerivZone7Red (Address: 0x00a9)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.194. SecondDerivZone7Green (Address: 0x00aa)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.195. SecondDerivZone7Blue (Address: 0x00ab)

Bit(s)	Name	Description
8:15	`Y`
0:7	`X`

Table 1.196. X2Factors (Address: 0x00ac)

Bit(s)	Name	Description
8:15	`Y_ZONES`
0:7	`X_ZONES`

Table 1.197. AeWindowTopLeft (Address: 0x00c0)

Bit(s)	Name	Description
8:15	`TOP`
0:7	`LEFT`

Table 1.198. AeWindowHeightWidth (Address: 0x00c1)

Bit(s)	Name	Description
8:15	`HEIGHT`
0:7	`WIDTH`

Table 1.199. AeAfMeasurementEnable (Address: 0x80c3)

Bit(s)	Name	Description
2:2	`AF_ENABLE`
1:1	`AE_ENABLE`
0:0	`AE_W`

Table 1.200. AvgLuminanceAeW11W12 (Address: 0x00c4)

Bit(s)	Name	Description
8:15	`W12`
0:7	`W11`

Table 1.201. AvgLuminanceAeW13W14 (Address: 0x00c5)

Bit(s)	Name	Description
8:15	`W14`
0:7	`W13`

Table 1.202. AvgLuminanceAeW21W22 (Address: 0x00c6)

Bit(s)	Name	Description
8:15	`W22`
0:7	`W21`

Table 1.203. AvgLuminanceAeW23W24 (Address: 0x00c7)

Bit(s)	Name	Description
8:15	`W24`
0:7	`W23`

Table 1.204. AvgLuminanceAeW31W32 (Address: 0x00c8)

Bit(s)	Name	Description
8:15	`W32`
0:7	`W31`

Table 1.205. AvgLuminanceAeW33W34 (Address: 0x00c9)

Bit(s)	Name	Description
8:15	`W34`
0:7	`W33`

Table 1.206. AvgLuminanceAeW41W42 (Address: 0x00ca)

Bit(s)	Name	Description
8:15	`W42`
0:7	`W41`

Table 1.207. AvgLuminanceAeW43W44 (Address: 0x00cb)

Bit(s)	Name	Description
8:15	`W44`
0:7	`W43`

Table 1.208. ColorKillControls (Address: 0x00d2)

Bit(s)	Name	Description
9:9	`BIT_9`
6:8	`THRESHOLD`
3:5	`GAIN`
0:2	`SATURATION_POINT`

Table 1.209. HistogramLowerBounds (Address: 0x00d3)

Bit(s)	Name	Description
8:15	`Y0`
0:7	`X0`

Table 1.210. HistogramUpperBounds (Address: 0x00d4)

Bit(s)	Name	Description
8:15	`Y1`
0:7	`X1`

Table 1.211. BinDefinitions1 (Address: 0x00d5)

Bit(s)	Name	Description
8:10	`BIN_WIDTH`	0-4LSB 1-8LSB 2-16LSB…7-512LSB on a 10-bit scale
0:7	`OFFSET_BIN_0`	divided by 4 on 10-bit scale

Table 1.212. BinDefinitions2 (Address: 0x00d6)

Bit(s)	Name	Description
8:10	`BIN_WIDTH`	0-4LSB 1-8LSB 2-16LSB …7-512LSB on a 10-bit scale
0:7	`OFFSET_BIN_0`	divided by 4 on 10-bit scale

Table 1.213. HistogramWindowSize (Address: 0x00d7)

Bit(s)	Name	Description
13:13	`BIN_SET_READ`	0: bin set 1; 1: bin set 2
0:12	`NUMBER_PIXELS`

Table 1.214. PixelCounts01 (Address: 0x00d8)

Bit(s)	Name	Description
8:15	`BIN_1`
0:7	`BIN_0`

Table 1.215. PixelCounts23 (Address: 0x00d9)

Bit(s)	Name	Description
8:15	`BIN_3`
0:7	`BIN_2`

Table 1.216. AwbWindowPos (Address: 0x8002)

Bit(s)	Name	Description
4:7	`Y0`
0:3	`X0`

Table 1.217. AwbWindowSize (Address: 0x8003)

Bit(s)	Name	Description
4:7	`HEIGHT`
0:3	`WIDTH`

Table 1.218. FdMode (Address: 0x8004)

Bit(s)	Name	Description
7:7	`MANUAL_MODE`	0=disable 1=enable
6:6	`CURR_SETTINGS`	0=60Hz 1=50Hz
5:5	`CURR_FLICKER_STATE`	0=60Hz 1=50Hz
4:4	`DEBUG_MODE`
0:3	`BITS_0_3`

Table 1.219. AfMode (Address: 0x8004)

Bit(s)	Name	Description
7:7	`MANUAL`	0: disabled; 1: enabled
6:6	`CREEP_COMP`	0: disabled; 1: enabled
0:0	`AF_TRIGGER`	1: start auto focusing

Table 1.220. AfModeEx (Address: 0x8005)

Bit(s)	Name	Description
7:7	`AF_SECOND_FLYBACK`	0: disabled; 1: enabled
6:6	`AF_STEPPING_TO_BEST_POS`	0: disabled; 1: enabled
5:5	`AF_FINE_SCAN`	0: disabled; 1: enabled
4:4	`AF_ERROR`
3:3	`AF_EXTRA_WAIT`	0: disabled; 1: enabled
2:2	`AF_EXTRA_WAIT_IS_ON`	1: extra wait is in progress
1:1	`AF_FINE_SCAN_IS_ON`	1: fine scan is in progress
0:0	`AF_SCORES_ARE_READY`	1: sharpness scores are ready

Table 1.221. AfNumSteps2 (Address: 0x8008)

Bit(s)	Name	Description
4:7	`REAL_NUM_FOCUS_POS`	for 2nd scan
0:3	`NUM_FOCUS_POS`	max 14

Table 1.222. AfmStatus (Address: 0x8005)

Bit(s)	Name	Description
3:4	`AFM_SM_POS_MOD_4`	Used only when type = 2
2:2	`AFM_LAST_MOVE_DIR`	0: forward (+); 1: backward (-)
1:1	`AFM_MOTION_INDICATOR`	0: AF lens actuator is stationary; 1: AF lens actuator is moving
0:0	`AFM_ERROR_INDICATOR`	0: no error; 1: some error message has been received from lens actuator

Table 1.223. AfmTimerConfig (Address: 0x8018)

Bit(s)	Name	Description
1:1	`AFM_TIMER_CONFIG_T0`	0: 0; 1: timer_maxShortDelay
0:0	`AFM_TIMER_CONFIG_TMOVE`	0: linear; 1: time = (move>maxQuickMove) ? maxLongDelay:maxShortDelay

Table 1.224. AfmSmDrvsgenmode (Address: 0x802b)

Bit(s)	Name	Description
3:3	`AFM_SM_WG_CLK_DIV_NUM`	0: divider 1; 1: divider 2
3:3	`AFM_SM_WG_CLK_DIV_MIN`	Can be used to force divider setting up, to slow stepper-driving waveforms
2:2	`AFM_SM_WG_CNT_MODE`	0: 8-bit mode; 1: 16-bit mode
1:1	`AFM_SM_FINE_POS`	0: disabled; 1: enabled
0:0	`AFM_SM_FINEST_POS`	0: disabled; 1: enabled

Table 1.225. AfmSmPiconfig (Address: 0x8031)

Bit(s)	Name	Description
5:7	`AFM_SM_PI_SETTLING_TIME`	Time in master clock cycles = 32+25*[32<<[sm_piConfig>>5]]
4:4	`AFM_SM_PI_INIT_LOG_POS`	0: 0; 1: 255
3:3	`AFM_SM_PI_END_STATE`	0: PI inactive state; 1: PI active state
2:2	`AFM_SM_PI_ACTV_STATE`	0: logical low; 1: logical high
1:1	`AFM_SM_PI_EDGE_LOC`	0: near logical position 0; 1: near logical position 255
0:0	`AFM_SM_PI_USE`	1: use PI; 0: do not use PI, move motor to logical position indicated by bit 1

Table 1.226. ModeConfig (Address: 0x000b)

Bit(s)	Name	Description
13:13	`BIT_13`
12:12	`BIT_12`
5:5	`BYPASS_JPEG_B`	uploads to Reg10:2
4:4	`BYPASS_JPEG_A`	uploads to Reg10:2

Table 1.227. ModeSensorRowSpeedA (Address: 0x0019)

Bit(s)	Name	Description
14:15	`BITS_14_15`
13:13	`BIT_13`
8:8	`PIXCLK_INVERT`
4:7	`PIXCLK_DELAY`	In half mclk compared to internal pixclk
3:3	`BIT_3`
0:2	`PIXCLK_SPEED`	1ADC: Pclk = 2 mclks* bits[0:2]; 2ADC: bits[0:2]

Table 1.228. ModeSensorRowSpeedB (Address: 0x0025)

Bit(s)	Name	Description
14:15	`BITS_14_15`
13:13	`BIT_13`
8:8	`PIXCLK_INVERT`
4:7	`PIXCLK_DELAY`	In half mclk compared to internal pixclk
3:3	`BIT_3`
0:2	`PIXCLK_SPEED`	1ADC: Pclk = 2 mclks* bits[0:2]; 2ADC: bits[0:2]

Table 1.229. ModeDecCtrlA (Address: 0x002f)

Bit(s)	Name	Description
13:13	`COMPLETE_ROW`
12:12	`COMPLETE_COL`
11:11	`EN_4_2_0`
2:2	`HIGH_PRECISION`
1:1	`U_FIRST`
0:0	`DECIMATOR_CONTROL_0`

Table 1.230. ModeDecCtrlB (Address: 0x003d)

Bit(s)	Name	Description
13:13	`COMPLETE_ROW`
12:12	`COMPLETE_COL`
11:11	`EN_4_2_0`
2:2	`HIGH_PRECISION`
1:1	`U_FIRST`
0:0	`DECIMATOR_CONTROL_0`

Table 1.231. ModeGamContA (Address: 0x8043)

Bit(s)	Name	Description
4:6	`CONTRAST`	0:None 1:some 2:more 3:most 4:noise-reduction
0:2	`GAMMA`	0:1.0 1:.56 2:.45 3:User def

Table 1.232. ModeGamContB (Address: 0x8044)

Bit(s)	Name	Description
4:6	`CONTRAST`	0:None incr 1:some 2:more 3:most 4:noise-reduction
0:2	`GAMMA`	0:1.0 1:.56 2:.45 3:User def

Table 1.233. ModeFifoConf0A (Address: 0x006b)

Bit(s)	Name	Description
11:11	`FREEZE_UPDATE_JPEG`
10:10	`EN_SPOOF_CCIR_CODES`
9:9	`SIG_ABNORMAL_TERMINATION`
8:8	`DUP_FV_ON_LV`
7:7	`EN_BYTE_SWAP`	Spoof frame must be enabled [bit 0 = 1]
6:6	`EN_VAR_CLK_OUT_RATE`
5:5	`IGNORE_SPOOF_HEIGHT`
4:4	`SOI_EOI_IN_FV`
3:3	`EN_SOI_EOI`
2:2	`EN_CLK_OUT_INVALID_DATA`
1:1	`EN_CLK_OUT_BETWEEN_FRAMES`
0:0	`EN_SPOOF_FRAME`

Table 1.234. ModeFifoConf1A (Address: 0x006d)

Bit(s)	Name	Description
13:15	`PAD_SLEW_N2`	Used when output buffer is 50%-75% full
12:12	`BIT_12`
8:11	`MCLK_DIV_N2`	Used when output buffer is 50%-75% full
5:7	`PAD_SLEW_N1`	Used when output buffer is <50% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N1`	Used when output buffer is <50% full

Table 1.235. ModeFifoConf2A (Address: 0x806f)

Bit(s)	Name	Description
5:7	`PAD_SLEW_N3`	Used when output buffer is >75% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N3`	Used when output buffer is >75% full

Table 1.236. ModeFifoLenTimingA (Address: 0x0070)

Bit(s)	Name	Description
8:15	`SPOOF_LV_TRAIL`
0:7	`SPOOF_LV_LEAD`

Table 1.237. ModeFifoConf0B (Address: 0x0072)

Bit(s)	Name	Description
11:11	`FREEZE_UPDATE_JPEG`
10:10	`EN_SPOOF_CCIR_CODES`
9:9	`SIG_ABNORMAL_TERMINATION`
8:8	`DUP_FV_ON_LV`
7:7	`EN_BYTE_SWAP`	Spoof frame must be enabled [bit 0 = 1]
6:6	`EN_VAR_CLK_OUT_RATE`
5:5	`IGNORE_SPOOF_HEIGHT`
4:4	`SOI_EOI_IN_FV`
3:3	`EN_SOI_EOI`
2:2	`EN_CLK_OUT_INVALID_DATA`
1:1	`EN_CLK_OUT_BETWEEN_FRAMES`
0:0	`EN_SPOOF_FRAME`

Table 1.238. ModeFifoConf1B (Address: 0x0074)

Bit(s)	Name	Description
13:15	`PAD_SLEW_N2`	Used when output buffer is 50%-75% full
12:12	`BIT_12`
8:11	`MCLK_DIV_N2`	Used when output buffer is 50%-75% full
5:7	`PAD_SLEW_N1`	Used when output buffer is <50% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N1`	Used when output buffer is <50% full

Table 1.239. ModeFifoConf2B (Address: 0x8076)

Bit(s)	Name	Description
5:7	`PAD_SLEW_N3`	Used when output buffer is >75% full
4:4	`BIT_4`
0:3	`MCLK_DIV_N3`	Used when output buffer is >75% full

Table 1.240. ModeFifoLenTimingB (Address: 0x0077)

Bit(s)	Name	Description
8:15	`SPOOF_LV_TRAIL`
0:7	`SPOOF_LV_LEAD`

Table 1.241. ModeOutputFormatA (Address: 0x807d)

Bit(s)	Name	Description
6:7	`RGB_FORMAT`	0: 565; 1: 555; 2: 444x; 3: x444
5:5	`OUTPUT_MODE`	0: YUV; 1: RGB
4:4	`CCIR656`
3:3	`MONOCHROME`
2:2	`BIT_2`
1:1	`SWAP_CHROMINANCE_LUMA`
0:0	`SWAP_CHANNELS`	swaps Cb Cr in YUV and R B in RGB

Table 1.242. ModeOutputFormatB (Address: 0x807e)

Bit(s)	Name	Description
6:7	`RGB_FORMAT`	0: 565; 1: 555; 2: 444x; 3: x444
5:5	`OUTPUT_MODE`	0: YUV; 1: RGB
4:4	`CCIR656`
3:3	`MONOCHROME`
2:2	`BIT_2`
1:1	`SWAP_CHROMINANCE_LUMA`
0:0	`SWAP_CHANNELS`	swaps Cb Cr in YUV and R B in RGB

Table 1.243. ModeSpecEffectsA (Address: 0x007f)

Bit(s)	Name	Description
3:10	`SOLARIZATION_THRESH`
0:2	`SELECTION`	1: mono; 2: sepia; 3: negative; 4: solarization 5: solarization w/ UV

Table 1.244. ModeSpecEffectsB (Address: 0x0081)

Bit(s)	Name	Description
3:10	`SOLARIZATION_THRESH`
0:2	`SELECTION`	1: mono; 2: sepia; 3: negative; 4: solarization 5: solarization w/ UV

Table 1.245. JpegConfig (Address: 0x8007)

Bit(s)	Name	Description
6:7	`QTABLE`
5:5	`QTABLE_AUTOSEL`	Automatically select next Q table after encode error
4:4	`QTABLE_GEN`	Make Q tables automatically by scaling an internal base table
3:3	`HOST_READY`	Host indicates it is ready for next frame
2:2	`RETRY`	Retry capture after unsuccessful encode or transfer
1:1	`ERRCHECK`	Enable handshaking with host at every erroneous frame
0:0	`VIDEO`	0: Still; 1: Video

CameraMT9T111

Device Revision: 0 .0develop

Properties

Table 1.246. SysCtl

Property	Type	Flags
ChipId	INT	RO
I2CMasterClkdiv	INT	RW
RowStart	INT	RW
RowStop	INT	RW
ColStart	INT	RW
ColStop	INT	RW
MCUBoot	INT	RW
StatusControl	INT	RW
SOCStandby	BOOL	RW
StandbyDone	BOOL	RO
ResetMiscCtrl	INT	RW
VddDisCounter	INT	RW
PLL	STRUCT	RW

Table 1.247. XDMA

Property	Type	Flags
MCUphyAddr	INT	RW
MCUlogAddr	INT	RW
MCUdata	ARRAY	RW

Table 1.248. Mid Level

Property	Type	Flags	Description
JpegClock	INT	RW
OutBufStatus	INT	RW
JPEGStatus	INT	RW
JPEGState	INT	RW
JPEGMode	INT	RW
ModeA	STRUCT	RW	Deprecated: Use Mode[0]
ModeB	STRUCT	RW
Sequencer	STRUCT	RW
Mode	ARRAY	RW

Table 1.249. PanTiltZoom

Property	Type	Flags
ScalerStatus	INT	RW
ZoomX0	INT	RW
ZoomX1	INT	RW
ZoomY0	INT	RW
ZoomY1	INT	RW
OriginW	INT	RW
OriginH	INT	RW
OriginX	INT	RW
OriginY	INT	RW
Zoom	INT	RW
PTZ	STRUCT	RW
Scaler	STRUCT	RW

Table 1.250. Experimental

Property	Type	Flags	Description
Dump	COMMAND	WO
Brightness	INT	RW
AE_AGainMin	INT	RW
AE_ExpCenter	INT	RW
AERule	STRUCT	RW
Context	ARRAY	RW	The context array node. Allows easy access of the context variables

Low level address map

SYSCTL

Table 1.251. Address map SYSCTL starting at absolute address 0x0000

Offset [Span]	Name(Id)	Access	Description
`0x000 [2]`	chip_id	RO	Chip ID.
`0x006 [2]`	i2c_control	RW
`0x010 [2]`	pll_dividers	RW	This register specifies the divider for the PLL.
`0x012 [2]`	pll_p_dividers	RW	This register specifies the divider for the PLL.
`0x014 [2]`	pll_control	RW	This register initializes and controls the PLL.
`0x016 [2]`	clocks_control	RW
`0x018 [2]`	standby_control_and_status	RW	This register controls and provides status for standby.
`0x01a [2]`	reset_and_misc_control	RW
`0x01c [2]`	mcu_boot_mode	RW	This register generates reset to the MCU.
`0x01e [2]`	pad_slew_pad_config	RW
`0x022 [2]`	vdd_dis_counter	RW	Control the delay of vdd_dis counter, by default,
`0x028 [2]`	en_vdd_dis_soft	RW	Enable/ disable register 0x0020[0] (vdd_dis_soft) bit function.
`0x02a [2]`	pll_p4_p5_p6_dividers	RW	This register specifies the divider for the PLL.
`0x02c [2]`	pll_p7_divider	RW	This register specifies the divider for the PLL.
`0x032 [2]`	s_clk_pad_slew_rate	RW	External sensor master clock pad slew rate

XDMA

Table 1.252. Address map XDMA starting at absolute address

Offset [Span]	Name(Id)	Access
`0x0982 [2]`	access_ctl_stat	RW
`0x098a [2]`	physical_address_access	RW
`0x098e [2]`	logical_address_access	RW
`0x0990 [2]`	mcu_variable_data	RW

Sequencer

Table 1.253. Address map Sequencer starting at absolute address 0x4200

Offset [Span]	Name(Id)	Access	Description
`0x8000 [1]`	seq_cmd	RW
`0x8001 [1]`	seq_state	RW

Core

Table 1.254. Address map Core starting at absolute address 0x3000

Offset [Span]	Name(Id)	Access
`0x0002 [2]`	y_addr_start	RW
`0x0004 [2]`	x_addr_start	RW
`0x0006 [2]`	y_addr_end	RW
`0x0008 [2]`	x_addr_end	RW
`0x000a [2]`	frame_length_lines	RW
`0x000c [2]`	line_length_pck	RW
`0x01fe [2]`	customer_rev	RW

GPIO_SS

Table 1.255. Address map GPIO_SS starting at absolute address

Offset [Span]	Name(Id)	Access	Description
`0x3b84 [2]`	i2c_master_frequency_divider	RW
`0x3b86 [2]`	txbuffer_total_byte_count	RW

SOC1_3130

Table 1.256. Address map SOC1_3130 starting at absolute address

Offset [Span]	Name(Id)	Access
`0x3210 [2]`	color_pipeline_control	RW
`0x3222 [2]`	zoom_window_x0	RW
`0x3224 [2]`	zoom_window_x1	RW
`0x3226 [2]`	zoom_window_y0	RW
`0x3228 [2]`	zoom_window_y1	RW
`0x322a [2]`	scale_control	RW
`0x322c [2]`	x_ratio	RW
`0x322e [2]`	y_ratio	RW

TX_SS

Table 1.257. Address map TX_SS starting at absolute address

Offset [Span]	Name(Id)	Access	Description
`0x3c54 [2]`	ob_jpeg_control_status	RW

FD_3130

Var ID 8

Table 1.258. Address map FD_3130 starting at absolute address 0x5000

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	fd_status	RW
`0x0003 [2]`	fd_algo	RW
`0x000f [2]`	fd_current_fdperiod	RW
`0x8002 [1]`	fd_mode	RW
`0x8005 [1]`	fd_fdperiod_select	RW
`0x8009 [1]`	fd_stat_min	RW
`0x800a [1]`	fd_stat_max	RW
`0x800b [1]`	fd_stat	RW
`0x800c [1]`	fd_min_amplitude	RW
`0x800d [1]`	fd_period	RW
`0x800e [1]`	fd_amplitude	RW

AE_RULE

Table 1.259. Address map AE_RULE starting at absolute address 0x5200

Offset [Span]	Name(Id)	Access	Description
`0x000 [2]`	ae_rule_status	RW	Current Status of Driver
`0x003 [2]`	ae_rule_algo	RW	Current Used Algorithm
`0x8002 [1]`	ae_rule_mode	RW	Currrent Driver Mode
`0x8008 [1]`	ae_rule_target_dampening	RW	Maximum allowed Change
`0x8009 [1]`	ae_rule_target_step_size	RW	Maximum Stepsize for Target
`0x8010 [1]`	ae_rule_start_top	RW	Brightness when to start changing Top Clipping Limit
`0x8011 [1]`	ae_rule_stop_top	RW	Brightness when to stop changing Top Clipping Limit
`0x8015 [1]`	ae_rule_offset_dampening	RW	Base Dampening for Offset. Needs to be between 32 and 8 !!!
`0x8018 [1]`	ae_rule_rule_dampening	RW	Dampening used for Brightness After Rules

AE_TRACK

Table 1.260. Address map AE_TRACK starting at absolute address 0x5400

Offset [Span]	Name(Id)	Access	Description
`0x000 [2]`	ae_track_status	RW	Current Status of Driver
`0x003 [2]`	ae_track_algo	RW	Current Used Algorithm
`0x8002 [1]`	ae_track_mode	RW	Currrent Driver Mode
`0x8007 [1]`	ae_track_max_black_level	RW	Maximum allowed black level subtraction
`0x800d [1]`	ae_track_target	RW	Average Target Brightness in LSB
`0x800e [1]`	ae_track_gate	RW	If Brightness is inside gate around target
`0x800f [1]`	ae_track_current_average_y	RW	Current Average brightness (From AE_RULE driver, this is the modified Average Y after applying rules)
`0x8010 [1]`	ae_track_ae_tracking_dampening	RW	Dampening Factor for Brightness Tracking

Camera1

Var ID 18

Table 1.261. Address map Camera1 starting at absolute address 0x6400

Offset [Span]	Name(Id)	Access	Description
`0x0002 [2]`	cam1_ctx_a_y_addr_start	RW
`0x0004 [2]`	cam1_ctx_a_x_addr_start	RW
`0x0006 [2]`	cam1_ctx_a_y_addr_end	RW
`0x0008 [2]`	cam1_ctx_a_x_addr_end	RW
`0x000a [2]`	cam1_ctx_a_row_speed	RW
`0x000c [2]`	cam1_ctx_a_read_mode	RW
`0x000f [2]`	cam1_ctx_a_fine_correction	RW
`0x0011 [2]`	cam1_ctx_a_fine_itmin	RW
`0x0013 [2]`	cam1_ctx_a_fine_itmax_margin	RW
`0x001d [2]`	cam1_ctx_a_base_frame_length_lines	RW
`0x001f [2]`	cam1_ctx_a_min_line_length_pclk	RW
`0x0025 [2]`	cam1_ctx_a_line_length_pck	RW
`0x002b [2]`	cam1_ctx_a_output_size_width	RW
`0x002d [2]`	cam1_ctx_a_output_size_height	RW
`0x0046 [1]`	cam1_ctx_a_rx_fifo_trigger_mark	RW
`0x800e [1]`	cam1_ctx_a_pixel_order	RW
`0x8044 [1]`	cam1_ctx_a_fdperiod_50hz	RW
`0x8045 [1]`	cam1_ctx_a_fdperiod_60hz	RW
`0x80a5 [1]`	cam1_fd_search_f1_50	RW
`0x80a6 [1]`	cam1_fd_search_f2_50	RW
`0x80a7 [1]`	cam1_fd_search_f1_60	RW
`0x80a8 [1]`	cam1_fd_search_f2_60	RW
`0x812d [1]`	cam1_ctx_a_fdperiod_60hz_msb	RW	undocumented!
`0x812f [1]`	cam1_ctx_a_fdperiod_50hz_msb	RW	undocumented!

JPEG_SOC3130

Var ID 22

Table 1.262. Address map JPEG_SOC3130 starting at absolute address 0x6c00

Offset [Span]	Name(Id)	Access
`0x00 [2]`	jpeg_status	RW
`0x0009 [2]`	jpeg_ob_data_length_lsbs	RW
`0x03 [2]`	jpeg_algo	RW
`0x8002`	jpeg_mode	RW
`0x8005`	jpeg_jp_status	RW
`0x8006`	jpeg_tn_status	RW
`0x8007`	jpeg_state	RW
`0x8008`	jpeg_ob_data_length_msb	RW

SysCtrl

Var ID 23

Table 1.263. Address map SysCtrl starting at absolute address 0x6e00

Offset [Span]	Name(Id)	Access	Description
`0x0000 [2]`	sys_status	RW
`0x000c [2]`	sys_origin_width	RW
`0x000e [2]`	sys_origin_height	RW
`0x0010 [2]`	sys_origin_x	RW
`0x0012 [2]`	sys_origin_y	RW
`0x0018 [2]`	sys_zoom_factor	RW
`0x003 [2]`	sys_algo	RW	Current Used Algorithm
`0x0044 [2]`	sys_zoom_target	RW
`0x8002 [1]`	sys_mode	RW
`0x800b [1]`	sys_scale_mode	RW
`0x8046 [1]`	sys_zoom_step_size	RW

IOControl

Var ID 24

Table 1.264. Address map IOControl starting at absolute address 0x7000

Offset [Span]	Name(Id)	Access
`0x0000 [2]`	io_status	RW
`0x0003 [2]`	io_algo	RW
`0x0025 [2]`	io_test_pattern_control	RW
`0x8002 [1]`	io_mode	RW

ContextAB_Switching

Table 1.265. Address map ContextAB_Switching starting at absolute address

Offset [Span]	Name(Id)	Access	Description
`0x00 [72]`	CONTEXT_TEMPLATE	RW	The template for the Context array element
`0x00 [512]`	MODE_TEMPLATE	RW	The template for the Mode array element

PRI_A

Table 1.266. Address map PRI_A starting at absolute address 0x7400

Offset [Span]	Name(Id)	Access	Description
`0x000 [2]`	pri_a_image_width	RW	Width of the image
`0x002 [2]`	pri_a_image_height	RW	Height of the image
`0x007 [2]`	pri_a_output_format	RW	Output format: RGB, YUV, Bayer, etc...
`0x009 [2]`	pri_a_output_format_order	RW	Order of pixels, bytes etc...dependent on outputFormat
`0x00d [2]`	pri_a_next_config	RW	Next Config After this for Chaining. (Upper 8 bit is trigger, lower 8 bit is Config Num) NOT USED YET
`0x00f [2]`	pri_a_config_fd_algo_enter	RW	Algorithm Setup for Enter State
`0x011 [2]`	pri_a_config_fd_algo_run	RW	Algorithm Setup for Run State
`0x013 [2]`	pri_a_config_fd_algo_leave	RW	Algorithm Setup for Leave State
`0x015 [2]`	pri_a_config_fd_max_fdzone_50hz	RW	Maximum number of flicker periods at 50 Hz for a given frame rate
`0x017 [2]`	pri_a_config_fd_max_fdzone_60hz	RW	Maximum number of flicker periods at 60 Hz for a given frame rate (Should be 16% more then at 50 Hz...)
`0x019 [2]`	pri_a_config_ae_rule_algo_enter	RW	Algorithm Setup for Enter State
`0x01b [2]`	pri_a_config_ae_rule_algo_run	RW	Algorithm Setup for Run State
`0x01d [2]`	pri_a_config_ae_rule_algo_leave	RW	Algorithm Setup for Leave State
`0x021 [2]`	pri_a_config_ae_rule_exp_comp_center	RW	Exposure Compensation Center Point
`0x025 [2]`	pri_a_config_ae_track_algo_enter	RW	Algorithm Setup for Enter State
`0x027 [2]`	pri_a_config_ae_track_algo_run	RW	Algorithm Setup for Run State
`0x029 [2]`	pri_a_config_ae_track_algo_leave	RW	Algorithm Setup for Leave State
`0x02d [2]`	pri_a_config_ae_track_target_fdzone	RW	AE Tries to keep IntTime (FDZone) below this value
`0x02f [2]`	pri_a_config_ae_track_target_again	RW	AE Tries to keep analog gain below this value
`0x031 [2]`	pri_a_config_ae_track_ae_min_virt_int_time_pclk	RW	Minimum Integration Time PCLK.
`0x033 [2]`	pri_a_config_ae_track_ae_min_virt_dgain	RW	Minimum Digital Gain (Normally Unitiy Gain)
`0x035 [2]`	pri_a_config_ae_track_ae_max_virt_dgain	RW	Maximum Digital Gain
`0x037 [2]`	pri_a_config_ae_track_ae_min_virt_again	RW	Minimum Analog Gain (Normally Unity Gain)
`0x039 [2]`	pri_a_config_ae_track_ae_max_virt_again	RW	Maximum Analog Gain
`0x03b [2]`	pri_a_config_ae_track_ae_min_fdzone	RW	Minimum FD Periods for Int Time (Normally 1)
`0x03d [2]`	pri_a_config_awb_algo_enter	RW	Algorithm Setup for Enter State
`0x03f [2]`	pri_a_config_awb_algo_run	RW	Algorithm Setup for Run State
`0x041 [2]`	pri_a_config_awb_algo_leave	RW	Algorithm Setup for Leave State
`0x043 [2]`	pri_a_config_awb_awb_xshift	RW	Shift parameter in x direction in prob table
`0x045 [2]`	pri_a_config_awb_awb_yshift	RW	Shift parameter in y direction in prob table
`0x050 [2]`	pri_a_config_is_algo_enter	RW	Algorithm Setup for Enter State
`0x052 [2]`	pri_a_config_is_algo_run	RW	Algorithm Setup for Run State
`0x054 [2]`	pri_a_config_is_algo_leave	RW	Algorithm Setup for Leave State
`0x057 [2]`	pri_a_config_is_feature_threshold	RW	Feature block threshold
`0x05a [2]`	pri_a_config_is_min_motion_window_thresh_abs	RW	Minimum absolute mV filter window
`0x05c [2]`	pri_a_config_is_blur_input_parameter	RW	Blur input parameter
`0x05e [2]`	pri_a_config_stat_algo_enter	RW	Algorithm Setup for Enter State
`0x060 [2]`	pri_a_config_stat_algo_run	RW	Algorithm Setup for Run State
`0x062 [2]`	pri_a_config_stat_algo_leave	RW	Algorithm Setup for Leave State
`0x065 [2]`	pri_a_config_ll_algo_enter	RW	Algorithm Setup for Enter State
`0x067 [2]`	pri_a_config_ll_algo_run	RW	Algorithm Setup for Run State
`0x069 [2]`	pri_a_config_ll_algo_leave	RW	Algorithm Setup for Leave State
`0x06b [2]`	pri_a_config_ll_start_brightness	RW	Brightness Metric to Start Transition
`0x06d [2]`	pri_a_config_ll_stop_brightness	RW	Brightness Metric to Stop
`0x071 [2]`	pri_a_config_flash_algo_enter	RW	Algorithm Setup for Enter State
`0x073 [2]`	pri_a_config_flash_algo_run	RW	Algorithm Setup for Run State
`0x075 [2]`	pri_a_config_flash_algo_leave	RW	Algorithm Setup for Leave State
`0x07b [2]`	pri_a_config_flash_auto_level	RW	Brightness Metric Below which the Flash will Auto-Activate
`0x07d [2]`	pri_a_config_sysctrl_algo_enter	RW	Algorithm Setup for Enter State
`0x07f [2]`	pri_a_config_sysctrl_algo_run	RW	Algorithm Setup for Run State
`0x081 [2]`	pri_a_config_sysctrl_algo_leave	RW	Algorithm Setup for Leave State
`0x088 [2]`	pri_a_config_jpeg_algo_enter	RW	Algorithm Setup for Enter State
`0x08a [2]`	pri_a_config_jpeg_algo_run	RW	Algorithm Setup for Run State
`0x08c [2]`	pri_a_config_jpeg_algo_leave	RW	Algorithm Setup for Leave State
`0x090 [2]`	pri_a_config_jpeg_config	RW	configuration, see config macros for bit definitions
`0x092 [2]`	pri_a_config_jpeg_restart_int	RW	restart marker interval; 0 - disable restart marker
`0x097 [2]`	pri_a_config_jpeg_tn_width	RW	12 bit, thumbnail scalar output pixels per line
`0x099 [2]`	pri_a_config_jpeg_tn_height	RW	9 bit, thumbnail scalar output lines per frame
`0x09b [2]`	pri_a_config_jpeg_ob_spoof_width_var	RW	JPEG spoof
`0x09d [2]`	pri_a_config_jpeg_ob_spoof_height_var	RW	This variable specifies the output buffer spoof height.
`0x0a0 [2]`	pri_a_config_jpeg_ob_tx_control_var	RW	OB_TX_Control 0x3c52
`0x0a2 [2]`	pri_a_config_jpeg_ob_intf_config	RW	OB_INTERFACE_CONFIGURATION 0x3C50
`0x0a4 [2]`	pri_a_config_io_algo_enter	RW	Algorithm Setup for Enter State
`0x0a6 [2]`	pri_a_config_io_algo_run	RW	Algorithm Setup for Run State
`0x0a8 [2]`	pri_a_config_io_algo_leave	RW	Algorithm Setup for Leave State
`0x0aa [2]`	pri_a_config_io_ob_mark_value	RW	Value of OB mark used when in manual mode
`0x0ad [2]`	pri_a_sync_frame	RW	Frame synchronization control bits
`0x0af [2]`	pri_a_zoom_factor_max	RW	Maximum zoom factor allowable given origin and output size constraints. Read only.
`0x0b1 [2]`	pri_a_zoom_factor	RW	Preserve zoom factor
`0x8004 [1]`	pri_a_num_of_frames_enter	RW	Number of Frames in Enter State. 0= Infinite
`0x8005 [1]`	pri_a_num_of_frames_run	RW	Number of Frames in Run State. 0= Infinite
`0x8006 [1]`	pri_a_num_of_frames_leave	RW	Number of Frames in Leave State. 0= Infinite
`0x800b [1]`	pri_a_config_sensor	RW	Sensor that is used with this Config. NOT USED YET
`0x800c [1]`	pri_a_config_context	RW	Sensor Context that is used with this Config. NOT USED YET
`0x801f [1]`	pri_a_config_ae_rule_base_target	RW	Base Target for Exposure
`0x8020 [1]`	pri_a_config_ae_rule_drt_ae_ctrl	RW	Enable Disable features
`0x8023 [1]`	pri_a_config_ae_rule_exp_comp_low_light	RW	Exposure Compensation Low Light
`0x8024 [1]`	pri_a_config_ae_rule_exp_comp_bright_light	RW	Exposure Compensation Bright Light
`0x802b [1]`	pri_a_config_ae_track_skip_frames	RW	Frames to wait between
`0x802c [1]`	pri_a_config_ae_track_jump_divisor	RW	Determines the settling speed for ae brightness tracking
`0x8049 [1]`	pri_a_config_awb_x0	RW	CCM position threshold in which to use the tint offsets.
`0x804a [1]`	pri_a_config_awb_k_r_l	RW	The K red offset for the left matrix.
`0x804b [1]`	pri_a_config_awb_k_g_l	RW	The K green offset for the left matrix.
`0x804c [1]`	pri_a_config_awb_k_b_l	RW	The K blue offset for the left matrix.
`0x804d [1]`	pri_a_config_awb_k_r_r	RW	The K red offset for the right matrix.
`0x804e [1]`	pri_a_config_awb_k_g_r	RW	The K green offset for the right matrix.
`0x804f [1]`	pri_a_config_awb_k_b_r	RW	The K blue offset for the right matrix.
`0x8056 [1]`	pri_a_config_is_mode	RW	Anti-shake mode
`0x8059 [1]`	pri_a_config_is_motion_window_thresh_percent	RW	Motion vector filter window %
`0x8064 [1]`	pri_a_config_stat_fd_vertical_windows	RW	Number of vertical windows
`0x806f [1]`	pri_a_config_ll_start_saturation	RW	Start Value for Saturation
`0x8070 [1]`	pri_a_config_ll_end_saturation	RW	End Value for Saturation
`0x8077 [1]`	pri_a_config_flash_usage_mode	RW	0 = off, 1 = on, 2 = locked, 3 = auto
`0x8078 [1]`	pri_a_config_flash_ledmode	RW	Simple LED, PWM Controlled, Multi-Color LED
`0x8079 [1]`	pri_a_config_flash_xenon_mode	RW	Simple Trigger, Power-Controlled
`0x807a [1]`	pri_a_config_flash_duration_blank_frames	RW	Duration the Flash signal will be turned on (0- Indefenite for LED)
`0x8083 [1]`	pri_a_config_sysctrl_select_fx	RW	Select Special Effect
`0x8084 [1]`	pri_a_config_sysctrl_solarization_th	RW	Solarization Threshold
`0x8085 [1]`	pri_a_config_sysctrl_sepia_cr	RW	Sepia Color CR
`0x8086 [1]`	pri_a_config_sysctrl_sepia_cb	RW	Sepia Color CB
`0x8087 [1]`	pri_a_config_sysctrl_y_offset	RW	Brightness/Luma offset
`0x808e [1]`	pri_a_config_jpeg_jp_mode	RW	JPEG, TN mode
`0x808f [1]`	pri_a_config_jpeg_format	RW	image format (monochrome, YUV422, YUV420)
`0x8094 [1]`	pri_a_config_jpeg_qscale1	RW	(0x8) scaling factor for quantization table set 1; bit7=1: new value
`0x8095 [1]`	pri_a_config_jpeg_qscale2	RW	(0xc) scaling factor for quantization table set 2; bit7=1: new value
`0x8096 [1]`	pri_a_config_jpeg_compression_ratio	RW	mimimum compression ratio for JPOP_LIMIT
`0x809f [1]`	pri_a_config_jpeg_ob_spoof_control_var	RW
`0x80ac [1]`	pri_a_config_io_ob_manual_flag	RW	If true, manual setting of OB watermark is used

PRI_B

Table 1.267. Address map PRI_B starting at absolute address 0x7600

Offset [Span]	Name(Id)	Access	Description
`0x000 [2]`	pri_b_image_width	RW	Width of the image
`0x002 [2]`	pri_b_image_height	RW	Height of the image
`0x007 [2]`	pri_b_output_format	RW	Output format: RGB, YUV, Bayer, etc...
`0x009 [2]`	pri_b_output_format_order	RW	Order of pixels, bytes etc...dependent on outputFormat
`0x00d [2]`	pri_b_next_config	RW	Next Config After this for Chaining. (Upper 8 bit is trigger, lower 8 bit is Config Num) NOT USED YET
`0x00f [2]`	pri_b_config_fd_algo_enter	RW	Algorithm Setup for Enter State
`0x011 [2]`	pri_b_config_fd_algo_run	RW	Algorithm Setup for Run State
`0x013 [2]`	pri_b_config_fd_algo_leave	RW	Algorithm Setup for Leave State
`0x015 [2]`	pri_b_config_fd_max_fdzone_50hz	RW	Maximum number of flicker periods at 50 Hz for a given frame rate
`0x017 [2]`	pri_b_config_fd_max_fdzone_60hz	RW	Maximum number of flicker periods at 60 Hz for a given frame rate (Should be 16% more then at 50 Hz...)
`0x019 [2]`	pri_b_config_ae_rule_algo_enter	RW	Algorithm Setup for Enter State
`0x01b [2]`	pri_b_config_ae_rule_algo_run	RW	Algorithm Setup for Run State
`0x01d [2]`	pri_b_config_ae_rule_algo_leave	RW	Algorithm Setup for Leave State
`0x021 [2]`	pri_b_config_ae_rule_exp_comp_center	RW	Exposure Compensation Center Point
`0x025 [2]`	pri_b_config_ae_track_algo_enter	RW	Algorithm Setup for Enter State
`0x027 [2]`	pri_b_config_ae_track_algo_run	RW	Algorithm Setup for Run State
`0x029 [2]`	pri_b_config_ae_track_algo_leave	RW	Algorithm Setup for Leave State
`0x02d [2]`	pri_b_config_ae_track_target_fdzone	RW	AE Tries to keep IntTime (FDZone) below this value
`0x02f [2]`	pri_b_config_ae_track_target_again	RW	AE Tries to keep analog gain below this value
`0x031 [2]`	pri_b_config_ae_track_ae_min_virt_int_time_pclk	RW	Minimum Integration Time PCLK.
`0x033 [2]`	pri_b_config_ae_track_ae_min_virt_dgain	RW	Minimum Digital Gain (Normally Unitiy Gain)
`0x035 [2]`	pri_b_config_ae_track_ae_max_virt_dgain	RW	Maximum Digital Gain
`0x037 [2]`	pri_b_config_ae_track_ae_min_virt_again	RW	Minimum Analog Gain (Normally Unity Gain)
`0x039 [2]`	pri_b_config_ae_track_ae_max_virt_again	RW	Maximum Analog Gain
`0x03b [2]`	pri_b_config_ae_track_ae_min_fdzone	RW	Minimum FD Periods for Int Time (Normally 1)
`0x03d [2]`	pri_b_config_awb_algo_enter	RW	Algorithm Setup for Enter State
`0x03f [2]`	pri_b_config_awb_algo_run	RW	Algorithm Setup for Run State
`0x041 [2]`	pri_b_config_awb_algo_leave	RW	Algorithm Setup for Leave State
`0x043 [2]`	pri_b_config_awb_awb_xshift	RW	Shift parameter in x direction in prob table
`0x045 [2]`	pri_b_config_awb_awb_yshift	RW	Shift parameter in y direction in prob table
`0x050 [2]`	pri_b_config_is_algo_enter	RW	Algorithm Setup for Enter State
`0x052 [2]`	pri_b_config_is_algo_run	RW	Algorithm Setup for Run State
`0x054 [2]`	pri_b_config_is_algo_leave	RW	Algorithm Setup for Leave State
`0x057 [2]`	pri_b_config_is_feature_threshold	RW	Feature block threshold
`0x05a [2]`	pri_b_config_is_min_motion_window_thresh_abs	RW	Minimum absolute mV filter window
`0x05c [2]`	pri_b_config_is_blur_input_parameter	RW	Blur input parameter
`0x05e [2]`	pri_b_config_stat_algo_enter	RW	Algorithm Setup for Enter State
`0x060 [2]`	pri_b_config_stat_algo_run	RW	Algorithm Setup for Run State
`0x062 [2]`	pri_b_config_stat_algo_leave	RW	Algorithm Setup for Leave State
`0x065 [2]`	pri_b_config_ll_algo_enter	RW	Algorithm Setup for Enter State
`0x067 [2]`	pri_b_config_ll_algo_run	RW	Algorithm Setup for Run State
`0x069 [2]`	pri_b_config_ll_algo_leave	RW	Algorithm Setup for Leave State
`0x06b [2]`	pri_b_config_ll_start_brightness	RW	Brightness Metric to Start Transition
`0x06d [2]`	pri_b_config_ll_stop_brightness	RW	Brightness Metric to Stop
`0x071 [2]`	pri_b_config_flash_algo_enter	RW	Algorithm Setup for Enter State
`0x073 [2]`	pri_b_config_flash_algo_run	RW	Algorithm Setup for Run State
`0x075 [2]`	pri_b_config_flash_algo_leave	RW	Algorithm Setup for Leave State
`0x07b [2]`	pri_b_config_flash_auto_level	RW	Brightness Metric Below which the Flash will Auto-Activate
`0x07d [2]`	pri_b_config_sysctrl_algo_enter	RW	Algorithm Setup for Enter State
`0x07f [2]`	pri_b_config_sysctrl_algo_run	RW	Algorithm Setup for Run State
`0x081 [2]`	pri_b_config_sysctrl_algo_leave	RW	Algorithm Setup for Leave State
`0x088 [2]`	pri_b_config_jpeg_algo_enter	RW	Algorithm Setup for Enter State
`0x08a [2]`	pri_b_config_jpeg_algo_run	RW	Algorithm Setup for Run State
`0x08c [2]`	pri_b_config_jpeg_algo_leave	RW	Algorithm Setup for Leave State
`0x090 [2]`	pri_b_config_jpeg_config	RW	configuration, see config macros for bit definitions
`0x092 [2]`	pri_b_config_jpeg_restart_int	RW	restart marker interval; 0 - disable restart marker
`0x097 [2]`	pri_b_config_jpeg_tn_width	RW	12 bit, thumbnail scalar output pixels per line
`0x099 [2]`	pri_b_config_jpeg_tn_height	RW	9 bit, thumbnail scalar output lines per frame
`0x09b [2]`	pri_b_config_jpeg_ob_spoof_width_var	RW	JPEG spoof
`0x09d [2]`	pri_b_config_jpeg_ob_spoof_height_var	RW	This variable specifies the output buffer spoof height.
`0x0a0 [2]`	pri_b_config_jpeg_ob_tx_control_var	RW	OB_TX_Control 0x3c52
`0x0a2 [2]`	pri_b_config_jpeg_ob_intf_config	RW	OB_INTERFACE_CONFIGURATION 0x3C50
`0x0a4 [2]`	pri_b_config_io_algo_enter	RW	Algorithm Setup for Enter State
`0x0a6 [2]`	pri_b_config_io_algo_run	RW	Algorithm Setup for Run State
`0x0a8 [2]`	pri_b_config_io_algo_leave	RW	Algorithm Setup for Leave State
`0x0aa [2]`	pri_b_config_io_ob_mark_value	RW	Value of OB mark used when in manual mode
`0x0ad [2]`	pri_b_sync_frame	RW	Frame synchronization control bits
`0x0af [2]`	pri_b_zoom_factor_max	RW	Maximum zoom factor allowable given origin and output size constraints. Read only.
`0x0b1 [2]`	pri_b_zoom_factor	RW	Preserve zoom factor
`0x8004 [1]`	pri_b_num_of_frames_enter	RW	Number of Frames in Enter State. 0= Infinite
`0x8005 [1]`	pri_b_num_of_frames_run	RW	Number of Frames in Run State. 0= Infinite
`0x8006 [1]`	pri_b_num_of_frames_leave	RW	Number of Frames in Leave State. 0= Infinite
`0x800b [1]`	pri_b_config_sensor	RW	Sensor that is used with this Config. NOT USED YET
`0x800c [1]`	pri_b_config_context	RW	Sensor Context that is used with this Config. NOT USED YET
`0x801f [1]`	pri_b_config_ae_rule_base_target	RW	Base Target for Exposure
`0x8020 [1]`	pri_b_config_ae_rule_drt_ae_ctrl	RW	Enable Disable features
`0x8023 [1]`	pri_b_config_ae_rule_exp_comp_low_light	RW	Exposure Compensation Low Light
`0x8024 [1]`	pri_b_config_ae_rule_exp_comp_bright_light	RW	Exposure Compensation Bright Light
`0x802b [1]`	pri_b_config_ae_track_skip_frames	RW	Frames to wait between
`0x802c [1]`	pri_b_config_ae_track_jump_divisor	RW	Determines the settling speed for ae brightness tracking
`0x8049 [1]`	pri_b_config_awb_x0	RW	CCM position threshold in which to use the tint offsets.
`0x804a [1]`	pri_b_config_awb_k_r_l	RW	The K red offset for the left matrix.
`0x804b [1]`	pri_b_config_awb_k_g_l	RW	The K green offset for the left matrix.
`0x804c [1]`	pri_b_config_awb_k_b_l	RW	The K blue offset for the left matrix.
`0x804d [1]`	pri_b_config_awb_k_r_r	RW	The K red offset for the right matrix.
`0x804e [1]`	pri_b_config_awb_k_g_r	RW	The K green offset for the right matrix.
`0x804f [1]`	pri_b_config_awb_k_b_r	RW	The K blue offset for the right matrix.
`0x8056 [1]`	pri_b_config_is_mode	RW	Anti-shake mode
`0x8059 [1]`	pri_b_config_is_motion_window_thresh_percent	RW	Motion vector filter window %
`0x8064 [1]`	pri_b_config_stat_fd_vertical_windows	RW	Number of vertical windows
`0x806f [1]`	pri_b_config_ll_start_saturation	RW	Start Value for Saturation
`0x8070 [1]`	pri_b_config_ll_end_saturation	RW	End Value for Saturation
`0x8077 [1]`	pri_b_config_flash_usage_mode	RW	0 = off, 1 = on, 2 = locked, 3 = auto
`0x8078 [1]`	pri_b_config_flash_ledmode	RW	Simple LED, PWM Controlled, Multi-Color LED
`0x8079 [1]`	pri_b_config_flash_xenon_mode	RW	Simple Trigger, Power-Controlled
`0x807a [1]`	pri_b_config_flash_duration_blank_frames	RW	Duration the Flash signal will be turned on (0- Indefenite for LED)
`0x8083 [1]`	pri_b_config_sysctrl_select_fx	RW	Select Special Effect
`0x8084 [1]`	pri_b_config_sysctrl_solarization_th	RW	Solarization Threshold
`0x8085 [1]`	pri_b_config_sysctrl_sepia_cr	RW	Sepia Color CR
`0x8086 [1]`	pri_b_config_sysctrl_sepia_cb	RW	Sepia Color CB
`0x8087 [1]`	pri_b_config_sysctrl_y_offset	RW	Brightness/Luma offset
`0x808e [1]`	pri_b_config_jpeg_jp_mode	RW	JPEG, TN mode
`0x808f [1]`	pri_b_config_jpeg_format	RW	image format (monochrome, YUV422, YUV420)
`0x8094 [1]`	pri_b_config_jpeg_qscale1	RW	(0x8) scaling factor for quantization table set 1; bit7=1: new value
`0x8095 [1]`	pri_b_config_jpeg_qscale2	RW	(0xc) scaling factor for quantization table set 2; bit7=1: new value
`0x8096 [1]`	pri_b_config_jpeg_compression_ratio	RW	mimimum compression ratio for JPOP_LIMIT
`0x809f [1]`	pri_b_config_jpeg_ob_spoof_control_var	RW
`0x80ac [1]`	pri_b_config_io_ob_manual_flag	RW	If true, manual setting of OB watermark is used

Detailed register description

Table 1.268. pll_dividers (Address: 0x010)

Bit(s)	Name	Description
8:13	`N`	PLL N divider
0:7	`M`	PLL M divider

Table 1.269. pll_p_dividers (Address: 0x012)

Bit(s)	Name	Description
12:13	`WORD_CLOCK_DIVIDER`	PLL word clock divider
8:11	`P3`	PLL system clock divider ratio P3
4:7	`P2`	PLL p2 divider
0:3	`P1`	PLL system clock divider ratio P2

Table 1.270. pll_control (Address: 0x014)

Bit(s)	Name	Description
15:15	`PLL_LOCK`	PLL lock status
13:13	`CLOCKIN_HYST_EN`	Enable hysteresis on clock input pin
12:12	`BIT_12`
11:11	`BIT_11`
10:10	`TEST_BYPASS`	Feeds tclk to P &M dividers instead of VCO output
9:9	`BIT_9`
8:8	`RESET_CNTR`	Asynchronous/synchronous reset for N,M and P
4:7	`BITS_4_7`
2:3	`BITS_2_3`
1:1	`PLL_ENABLE`	PLL enable
0:0	`PLL_BYPASS`	PLL bypass

Table 1.271. clocks_control (Address: 0x016)

Bit(s)	Name	Description
15:15	`BIT_15`
14:14	`BIT_14`
11:13	`BITS_11_13`
10:10	`BIT_10`
9:9	`CLK_CLKIN_EN`	Enable external clock pad
8:8	`BIT_8`
6:6	`BIT_6`
5:5	`BIT_5`
4:4	`BIT_4`
3:3	`BIT_3`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.272. standby_control_and_status (Address: 0x018)

Bit(s)	Name	Description
14:14	`STANDBY_DONE`	In Standby state
6:6	`BIT_6`
5:5	`BIT_5`
4:4	`BIT_4`
3:3	`EN_IRQ`	Enable Interrupt request
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`STANDBY_I2C`	Soft standby bit

Table 1.273. reset_and_misc_control (Address: 0x01a)

Bit(s)	Name	Description
10:10	`BIT_10`
9:9	`PARALLEL_ENABLE`	1=parallel output enable
8:8	`OE_GP_ENABLE`	Enables GPIO function
5:5	`CLKIN_IP_PD_EN`	CLK pad input pd
4:4	`IP_PD_EN`	GPIO pad input pd
3:3	`VGP_IP_PD_EN`	VGPIO pad input pd
2:2	`BIT_2`
1:1	`MIPI_TX_RESET`	Reset MIPI TX
0:0	`RESET_SOC_I2C`	Chip Soft reset bit

Table 1.274. mcu_boot_mode (Address: 0x01c)

Bit(s)	Name	Description
8:15	`BITS_8_15`
5:5	`BIT_5`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`RESET_MCU`	Reset MCU

Table 1.275. pad_slew_pad_config (Address: 0x01e)

Bit(s)	Name	Description
8:10	`SLEW_PXLCLK`	PIXCLK pad slew rate
4:6	`SLEW_GPIO`	GPIO pads slew rate
0:2	`SLEW_IO`	DOUT* pads slew rate

Table 1.276. pll_p4_p5_p6_dividers (Address: 0x02a)

Bit(s)	Name	Description
14:14	`BIT_14`
13:13	`P5_EN`	Enable p5_clk
12:12	`P4_EN`	Enable p4_clk
8:11	`P6`
4:7	`P5`	PLL clock divider ratio for p5_clk (clk_pix_soc, ect)
0:3	`P4`	PLL clock divider ratio for p4_clk (clk_pixel, ect)

Table 1.277. pll_p7_divider (Address: 0x02c)

Bit(s)	Name	Description
13:13	`BIT_13`
12:12	`P7_EN`	Enable p7_clk
4:7	`BITS_4_7`
0:3	`P7`	PLL clock divider ratio for p7_clk (clk_sensor1)

Table 1.278. color_pipeline_control (Address: 0x3210)

Bit(s)	Name	Description
10:10	`EN_1DAPP`
8:8	`BYPASS_N`
7:7	`GAMMA_EN`
5:5	`COLOR_CORRECTION`
4:4	`EN_AP`
3:3	`PGA_ENABLE`

Table 1.279. scale_control (Address: 0x322a)

Bit(s)	Name	Description
4:4	`EN420`
2:2	`HIGH_PRECISION_MODE`

Table 1.280. ae_rule_algo (Address: 0x003)

Bit(s)	Name	Description
15:15	`AE_RULE_AUTO_CLEAR`	Autoclear Algo variable after first execution
5:5	`BIT_5`
4:4	`BIT_4`
3:3	`BIT_3`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.281. ae_track_status (Address: 0x000)

Bit(s)	Name	Description
4:4	`AE_TRACK_AE_STATUS_AF_READY`	AE has settled and AF can proceed
3:3	`AE_TRACK_AE_STATUS_READY`	AE has settled
2:2	`AE_TRACK_AE_STATUS_SKIP_FRAME`	Integration time has changed - skipping next frame
1:1	`AE_TRACK_AE_STATUS_LIMITHIGH`	AE has reached upper boundary
0:0	`AE_TRACK_AE_STATUS_LIMITLOW`	AE has reached lower boundary

Table 1.282. ae_track_algo (Address: 0x003)

Bit(s)	Name	Description
15:15	`AE_TRACK_AUTO_CLEAR`	Autoclear Algo variable after first execution
4:4	`BIT_4`
3:3	`BIT_3`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.283. cam1_ctx_a_read_mode (Address: 0x000c)

Bit(s)	Name	Description
12:12	`BIN_SUM`
11:11	`X_BIN_EN`
10:10	`XY_BIN_EN`
9:9	`LOW_POWER`
5:7	`X_ODD_ADDR_INC`
2:4	`Y_ODD_ADDR_INC`
1:1	`VERT_FLIP`
0:0	`HORIZ_MIRROR`

Table 1.284. sys_algo (Address: 0x003)

Bit(s)	Name	Description
15:15	`SYS_AUTO_CLEAR`	Auto Clear Algo Field
11:11	`BIT_11`
10:10	`BIT_10`
8:8	`BIT_8`
7:7	`BIT_7`
6:6	`BIT_6`
5:5	`SET_SCALER`
4:4	`BIT_4`
3:3	`BIT_3`
2:2	`BIT_2`
1:1	`BIT_1`
0:0	`BIT_0`

Table 1.285. sys_scale_mode (Address: 0x800b)

Bit(s)	Name	Description
2:2	`AUTOZOOM`
1:1	`AUTO_AE_ZONE`
0:0	`PRESERVE_ZOOM_FACTOR`

Table 1.286. pri_a_output_format (Address: 0x007)

Bit(s)	Name	Description
9:9	`PRI_A_OF_MONO`	Monochrome but not special effect
8:8	`PRI_A_OF_PROCESSED_BAYER`	Processed Bayer with no by-pass
7:7	`BIT_7`
6:6	`PRI_A_OF_RAW10`	Bayer by-pass 10-bit
5:5	`PRI_A_OF_RAW8`	Bayer by-pass 8-bit
4:4	`PRI_A_OF_RGB444X`	RGB 444
3:3	`PRI_A_OF_RGB555X`	RGB 555
2:2	`PRI_A_OF_RGB565`	RGB 565
1:1	`BIT_1`
0:0	`PRI_A_OF_YUV422`	YCbCr

Table 1.287. pri_a_output_format_order (Address: 0x009)

Bit(s)	Name	Description
8:8	`PRI_A_OF_BAYER_FIRST_GB`	Processed bayer output first color Gb
7:7	`PRI_A_OF_BAYER_FIRST_B`	Processed bayer output first color B
6:6	`PRI_A_OF_BAYER_FIRST_R`	Processed bayer output first color R
5:5	`PRI_A_OF_BAYER_FIRST_GR`	Processed bayer output first color Gr
4:4	`PRI_A_OF_YUV_EVEN_ODD`	Select sampling mode for YUV422 even U odd V
3:3	`PRI_A_OF_YUV_ODD`	Select sampling mode for YUV422 odd UV
2:2	`PRI_A_OF_YUV_EVEN`	Select sampling mode for YUV422 even UV
1:1	`PRI_A_OF_SWAP_BYTE_ORDER`	1: Swap output pixel hi byte with low byte, 0: don't swap
0:0	`PRI_A_OF_SWAP_RED_BLUE`	1: Swap R/B or Cr/Cb channels, 0 don't swap R/B or Cr/Cb channels

Table 1.288. pri_a_config_fd_algo_enter (Address: 0x00f)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FD_ALGO_ENTER_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_A_CONFIG_FD_ALGO_ENTER_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.289. pri_a_config_fd_algo_run (Address: 0x011)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FD_ALGO_RUN_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_A_CONFIG_FD_ALGO_RUN_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.290. pri_a_config_fd_algo_leave (Address: 0x013)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FD_ALGO_LEAVE_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_A_CONFIG_FD_ALGO_LEAVE_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.291. pri_a_config_ae_rule_algo_enter (Address: 0x019)

Bit(s)	Name	Description
5:5	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_A_CONFIG_AE_RULE_ALGO_ENTER_SETUP_RULES`	Execute SetupDebugger routine

Table 1.292. pri_a_config_ae_rule_algo_run (Address: 0x01b)

Bit(s)	Name	Description
5:5	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_A_CONFIG_AE_RULE_ALGO_RUN_SETUP_RULES`	Execute SetupDebugger routine

Table 1.293. pri_a_config_ae_rule_algo_leave (Address: 0x01d)

Bit(s)	Name	Description
5:5	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_A_CONFIG_AE_RULE_ALGO_LEAVE_SETUP_RULES`	Execute SetupDebugger routine

Table 1.294. pri_a_config_ae_track_algo_enter (Address: 0x025)

Bit(s)	Name	Description
4:4	`PRI_A_CONFIG_AE_TRACK_ALGO_ENTER_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_A_CONFIG_AE_TRACK_ALGO_ENTER_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_A_CONFIG_AE_TRACK_ALGO_ENTER_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_A_CONFIG_AE_TRACK_ALGO_ENTER_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_A_CONFIG_AE_TRACK_ALGO_ENTER_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.295. pri_a_config_ae_track_algo_run (Address: 0x027)

Bit(s)	Name	Description
4:4	`PRI_A_CONFIG_AE_TRACK_ALGO_RUN_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_A_CONFIG_AE_TRACK_ALGO_RUN_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_A_CONFIG_AE_TRACK_ALGO_RUN_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_A_CONFIG_AE_TRACK_ALGO_RUN_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_A_CONFIG_AE_TRACK_ALGO_RUN_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.296. pri_a_config_ae_track_algo_leave (Address: 0x029)

Bit(s)	Name	Description
4:4	`PRI_A_CONFIG_AE_TRACK_ALGO_LEAVE_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_A_CONFIG_AE_TRACK_ALGO_LEAVE_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_A_CONFIG_AE_TRACK_ALGO_LEAVE_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_A_CONFIG_AE_TRACK_ALGO_LEAVE_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_A_CONFIG_AE_TRACK_ALGO_LEAVE_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.297. pri_a_config_awb_algo_enter (Address: 0x03d)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_AWB_ALGO_ENTER_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_A_CONFIG_AWB_ALGO_ENTER_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_A_CONFIG_AWB_ALGO_ENTER_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_A_CONFIG_AWB_ALGO_ENTER_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_A_CONFIG_AWB_ALGO_ENTER_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_A_CONFIG_AWB_ALGO_ENTER_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_A_CONFIG_AWB_ALGO_ENTER_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_A_CONFIG_AWB_ALGO_ENTER_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_A_CONFIG_AWB_ALGO_ENTER_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.298. pri_a_config_awb_algo_run (Address: 0x03f)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_AWB_ALGO_RUN_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_A_CONFIG_AWB_ALGO_RUN_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_A_CONFIG_AWB_ALGO_RUN_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_A_CONFIG_AWB_ALGO_RUN_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_A_CONFIG_AWB_ALGO_RUN_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_A_CONFIG_AWB_ALGO_RUN_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_A_CONFIG_AWB_ALGO_RUN_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_A_CONFIG_AWB_ALGO_RUN_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_A_CONFIG_AWB_ALGO_RUN_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.299. pri_a_config_awb_algo_leave (Address: 0x041)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_AWB_ALGO_LEAVE_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_A_CONFIG_AWB_ALGO_LEAVE_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_A_CONFIG_AWB_ALGO_LEAVE_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_A_CONFIG_AWB_ALGO_LEAVE_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_A_CONFIG_AWB_ALGO_LEAVE_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_A_CONFIG_AWB_ALGO_LEAVE_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_A_CONFIG_AWB_ALGO_LEAVE_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_A_CONFIG_AWB_ALGO_LEAVE_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_A_CONFIG_AWB_ALGO_LEAVE_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.300. pri_a_config_is_algo_enter (Address: 0x050)

Bit(s)	Name	Description
2:2	`PRI_A_CONFIG_IS_ALGO_ENTER_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_A_CONFIG_IS_ALGO_ENTER_LORISE`	Execute IS routine
0:0	`PRI_A_CONFIG_IS_ALGO_ENTER_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.301. pri_a_config_is_algo_run (Address: 0x052)

Bit(s)	Name	Description
2:2	`PRI_A_CONFIG_IS_ALGO_RUN_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_A_CONFIG_IS_ALGO_RUN_LORISE`	Execute IS routine
0:0	`PRI_A_CONFIG_IS_ALGO_RUN_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.302. pri_a_config_is_algo_leave (Address: 0x054)

Bit(s)	Name	Description
2:2	`PRI_A_CONFIG_IS_ALGO_LEAVE_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_A_CONFIG_IS_ALGO_LEAVE_LORISE`	Execute IS routine
0:0	`PRI_A_CONFIG_IS_ALGO_LEAVE_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.303. pri_a_config_is_mode (Address: 0x8056)

Bit(s)	Name	Description
3:3	`PRI_A_CONFIG_IS_IS_BRIGHTNESS_SCALE`	Automatically Scale AS values based on Brightness Metric
2:2	`PRI_A_CONFIG_IS_IS_FLICKER_AWARE`
1:1	`PRI_A_CONFIG_IS_IS_PASS1_SHARP_ENABLE`
0:0	`PRI_A_CONFIG_IS_IS_DRIVER_ENABLE`

Table 1.304. pri_a_config_stat_algo_enter (Address: 0x05e)

Bit(s)	Name	Description
12:12	`PRI_A_CONFIG_STAT_ALGO_ENTER_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_A_CONFIG_STAT_ALGO_ENTER_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_A_CONFIG_STAT_ALGO_ENTER_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_A_CONFIG_STAT_ALGO_ENTER_GET_FD`	Execute Get_FD routine
8:8	`PRI_A_CONFIG_STAT_ALGO_ENTER_GET_AF`	Execute Get_AF routine
7:7	`PRI_A_CONFIG_STAT_ALGO_ENTER_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_A_CONFIG_STAT_ALGO_ENTER_GET_HG`	Execute Get_HG routine
5:5	`PRI_A_CONFIG_STAT_ALGO_ENTER_GET_AE`	Execute Get_AE routine
4:4	`PRI_A_CONFIG_STAT_ALGO_ENTER_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_A_CONFIG_STAT_ALGO_ENTER_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_A_CONFIG_STAT_ALGO_ENTER_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_A_CONFIG_STAT_ALGO_ENTER_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_A_CONFIG_STAT_ALGO_ENTER_SETUP_AE`	Execute Setup_AE routine

Table 1.305. pri_a_config_stat_algo_run (Address: 0x060)

Bit(s)	Name	Description
12:12	`PRI_A_CONFIG_STAT_ALGO_RUN_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_A_CONFIG_STAT_ALGO_RUN_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_A_CONFIG_STAT_ALGO_RUN_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_A_CONFIG_STAT_ALGO_RUN_GET_FD`	Execute Get_FD routine
8:8	`PRI_A_CONFIG_STAT_ALGO_RUN_GET_AF`	Execute Get_AF routine
7:7	`PRI_A_CONFIG_STAT_ALGO_RUN_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_A_CONFIG_STAT_ALGO_RUN_GET_HG`	Execute Get_HG routine
5:5	`PRI_A_CONFIG_STAT_ALGO_RUN_GET_AE`	Execute Get_AE routine
4:4	`PRI_A_CONFIG_STAT_ALGO_RUN_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_A_CONFIG_STAT_ALGO_RUN_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_A_CONFIG_STAT_ALGO_RUN_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_A_CONFIG_STAT_ALGO_RUN_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_A_CONFIG_STAT_ALGO_RUN_SETUP_AE`	Execute Setup_AE routine

Table 1.306. pri_a_config_stat_algo_leave (Address: 0x062)

Bit(s)	Name	Description
12:12	`PRI_A_CONFIG_STAT_ALGO_LEAVE_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_A_CONFIG_STAT_ALGO_LEAVE_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_A_CONFIG_STAT_ALGO_LEAVE_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_A_CONFIG_STAT_ALGO_LEAVE_GET_FD`	Execute Get_FD routine
8:8	`PRI_A_CONFIG_STAT_ALGO_LEAVE_GET_AF`	Execute Get_AF routine
7:7	`PRI_A_CONFIG_STAT_ALGO_LEAVE_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_A_CONFIG_STAT_ALGO_LEAVE_GET_HG`	Execute Get_HG routine
5:5	`PRI_A_CONFIG_STAT_ALGO_LEAVE_GET_AE`	Execute Get_AE routine
4:4	`PRI_A_CONFIG_STAT_ALGO_LEAVE_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_A_CONFIG_STAT_ALGO_LEAVE_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_A_CONFIG_STAT_ALGO_LEAVE_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_A_CONFIG_STAT_ALGO_LEAVE_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_A_CONFIG_STAT_ALGO_LEAVE_SETUP_AE`	Execute Setup_AE routine

Table 1.307. pri_a_config_ll_algo_enter (Address: 0x065)

Bit(s)	Name	Description
7:7	`PRI_A_CONFIG_LL_ALGO_ENTER_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_A_CONFIG_LL_ALGO_ENTER_SETNOISE`	Execute SetNoise routine
5:5	`PRI_A_CONFIG_LL_ALGO_ENTER_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_A_CONFIG_LL_ALGO_ENTER_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_A_CONFIG_LL_ALGO_ENTER_SETTONAL`	Execute SetTonal routine
2:2	`PRI_A_CONFIG_LL_ALGO_ENTER_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_A_CONFIG_LL_ALGO_ENTER_AUTOTC`	Execute AutoTC routine

Table 1.308. pri_a_config_ll_algo_run (Address: 0x067)

Bit(s)	Name	Description
7:7	`PRI_A_CONFIG_LL_ALGO_RUN_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_A_CONFIG_LL_ALGO_RUN_SETNOISE`	Execute SetNoise routine
5:5	`PRI_A_CONFIG_LL_ALGO_RUN_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_A_CONFIG_LL_ALGO_RUN_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_A_CONFIG_LL_ALGO_RUN_SETTONAL`	Execute SetTonal routine
2:2	`PRI_A_CONFIG_LL_ALGO_RUN_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_A_CONFIG_LL_ALGO_RUN_AUTOTC`	Execute AutoTC routine

Table 1.309. pri_a_config_ll_algo_leave (Address: 0x069)

Bit(s)	Name	Description
7:7	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETNOISE`	Execute SetNoise routine
5:5	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETTONAL`	Execute SetTonal routine
2:2	`PRI_A_CONFIG_LL_ALGO_LEAVE_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_A_CONFIG_LL_ALGO_LEAVE_AUTOTC`	Execute AutoTC routine

Table 1.310. pri_a_config_flash_algo_enter (Address: 0x071)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FLASH_ALGO_ENTER_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_A_CONFIG_FLASH_ALGO_ENTER_SETMODE`	Execute SetPosition routine

Table 1.311. pri_a_config_flash_algo_run (Address: 0x073)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FLASH_ALGO_RUN_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_A_CONFIG_FLASH_ALGO_RUN_SETMODE`	Execute SetPosition routine

Table 1.312. pri_a_config_flash_algo_leave (Address: 0x075)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_FLASH_ALGO_LEAVE_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_A_CONFIG_FLASH_ALGO_LEAVE_SETMODE`	Execute SetPosition routine

Table 1.313. pri_a_config_sysctrl_algo_enter (Address: 0x07d)

Bit(s)	Name	Description
11:11	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_STANDBY`	Execute Standby routine
7:7	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_POWERUP`	Execute Powerup routine
6:6	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_FX`	Execute SetFX routine
5:5	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_CCM`	Execute SetCCM routine
2:2	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_A_CONFIG_SYSCTRL_ALGO_ENTER_SET_PLL`	Execute SetPLL routine

Table 1.314. pri_a_config_sysctrl_algo_run (Address: 0x07f)

Bit(s)	Name	Description
11:11	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_STANDBY`	Execute Standby routine
7:7	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_POWERUP`	Execute Powerup routine
6:6	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_FX`	Execute SetFX routine
5:5	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_CCM`	Execute SetCCM routine
2:2	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_A_CONFIG_SYSCTRL_ALGO_RUN_SET_PLL`	Execute SetPLL routine

Table 1.315. pri_a_config_sysctrl_algo_leave (Address: 0x081)

Bit(s)	Name	Description
11:11	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_STANDBY`	Execute Standby routine
7:7	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_POWERUP`	Execute Powerup routine
6:6	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_FX`	Execute SetFX routine
5:5	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_CCM`	Execute SetCCM routine
2:2	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_A_CONFIG_SYSCTRL_ALGO_LEAVE_SET_PLL`	Execute SetPLL routine

Table 1.316. pri_a_config_jpeg_jp_mode (Address: 0x808e)

Bit(s)	Name	Description
1:1	`PRI_A_CONFIG_JPEG_TN_ENABLE`	Enable thumbnail
0:0	`PRI_A_CONFIG_JPEG_JP_ENABLE`	Enable JPEG

Table 1.317. pri_a_config_jpeg_config (Address: 0x090)

Bit(s)	Name	Description
15:15	`PRI_A_CONFIG_JPEG_JP_CFG_FRM_OVFLW_PROTECT`	Frame overflow protection, 1=on, 0=off
14:14	`PRI_A_CONFIG_JPEG_JP_CFG_TN_INSERT_HDR`	TN insert header
13:13	`PRI_A_CONFIG_JPEG_JP_CFG_IGNORE_HT`	spoof mode ignore height
12:12	`PRI_A_CONFIG_JPEG_JP_CFG_AQLE`	Limit amount of data from JPEG engine to ensure the image compression ratio is greater than JPOP_LIMIT
11:11	`PRI_A_CONFIG_JPEG_JP_CFG_EOF_HDR`	Q-table four byte header code and EOF marker
10:10	`PRI_A_CONFIG_JPEG_JP_CFG_EOF`	add EOF (0xff, 0xd9) marker only
6:6	`PRI_A_CONFIG_JPEG_JP_CFG_QTBL_PTR`	quantization table to be used for next frame
5:5	`PRI_A_CONFIG_JPEG_JP_CFG_QTBL_AUTOSEL`	enable auto-select quantization table after unsuccessful JPEG encoding (in conjunction with JPEG_CFG_QTBLPTR)
4:4	`PRI_A_CONFIG_JPEG_JP_CFG_QSCALE_ENABLE`	enable scaled quantization table generation (in conjunction with qscale1/2 variables)
2:2	`PRI_A_CONFIG_JPEG_JP_CFG_RETRY_ENABLE`	retry after an unsuccessful encode or transfer

Table 1.318. pri_a_config_jpeg_ob_tx_control_var (Address: 0x0a0)

Bit(s)	Name	Description
15:15	`PRI_A_CONFIG_JPEG_OB_ENABLE_RESOLUTION`	OB Enable JPEG/THUMBNAIL resolution
14:14	`PRI_A_CONFIG_JPEG_OB_ENABLE_MIPI_LINE_BYTE_CNT`	OB Enable MIPI line byte count
13:13	`PRI_A_CONFIG_JPEG_OB_ENABLE_INDEX_TABLE`	OB Enable Index Table
12:12	`PRI_A_CONFIG_JPEG_OB_EN_LEGALIZE_STATUS`	OB Enable Legalize Status
11:11	`PRI_A_CONFIG_JPEG_OB_EN_CLK_B2_LINES`	Output Buffer Enable PCLK Between Lines
10:10	`PRI_A_CONFIG_JPEG_OB_INSERT_CCIR_CODES`	Output Buffer Insert CCIR Codes Enable
9:9	`PRI_A_CONFIG_JPEG_OB_INSERT_JP_STATUS`	Output Buffer Insert JPEG Status Enable
8:8	`PRI_A_CONFIG_JPEG_OB_DUP_FV_ON_LV`	Output Buffer Duplicate FV on LV
7:7	`PRI_A_CONFIG_JPEG_OB_EN_BYTE_SWAP`	Output Buffer Enable Byte Swap
6:6	`PRI_A_CONFIG_JPEG_OB_EN_ADAPTIVE_CLK`	Output Buffer Enable Adaptive Clock
5:5	`PRI_A_CONFIG_JPEG_OB_SOI_EOI_IN_FV`	Output Buffer SOI/EOI within Frame Valid
4:4	`PRI_A_CONFIG_JPEG_OB_EN_SOI_EOI`	Output Buffer Enable SOI and EOI
3:3	`PRI_A_CONFIG_JPEG_OB_EN_CLK_INVALID_DATA`	Output Buffer Enable Clock for Invalid Data
2:2	`PRI_A_CONFIG_JPEG_OB_EN_CLK_B2_FRAMES`	Output Buffer Enable Clock Between Frames
0:1	`PRI_A_CONFIG_JPEG_OB_TX_MODE`	Output Buffer Transmit Mode

Table 1.319. pri_a_config_jpeg_ob_intf_config (Address: 0x0a2)

Bit(s)	Name	Description
3:3	`PRI_A_CONFIG_JPEG_OB_RX_INTF_HIGH`	Output Buffer RX Interface High
2:2	`PRI_A_CONFIG_JPEG_OB_TX_INTF`	Output Buffer TX Interface
0:1	`PRI_A_CONFIG_JPEG_OB_RX_INTF_LOW`	Output Buffer RX Interface Low

Table 1.320. pri_a_config_io_algo_enter (Address: 0x0a4)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_IO_ALGO_ENTER_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_A_CONFIG_IO_ALGO_ENTER_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_A_CONFIG_IO_ALGO_ENTER_SET_INPUT`	Execute Set Input routine
5:5	`PRI_A_CONFIG_IO_ALGO_ENTER_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_A_CONFIG_IO_ALGO_ENTER_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_A_CONFIG_IO_ALGO_ENTER_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_A_CONFIG_IO_ALGO_ENTER_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_A_CONFIG_IO_ALGO_ENTER_READ_I2C`	Execute Read I2C routine
0:0	`PRI_A_CONFIG_IO_ALGO_ENTER_WRITE_I2C`	Execute Write I2C routine

Table 1.321. pri_a_config_io_algo_run (Address: 0x0a6)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_IO_ALGO_RUN_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_A_CONFIG_IO_ALGO_RUN_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_A_CONFIG_IO_ALGO_RUN_SET_INPUT`	Execute Set Input routine
5:5	`PRI_A_CONFIG_IO_ALGO_RUN_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_A_CONFIG_IO_ALGO_RUN_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_A_CONFIG_IO_ALGO_RUN_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_A_CONFIG_IO_ALGO_RUN_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_A_CONFIG_IO_ALGO_RUN_READ_I2C`	Execute Read I2C routine
0:0	`PRI_A_CONFIG_IO_ALGO_RUN_WRITE_I2C`	Execute Write I2C routine

Table 1.322. pri_a_config_io_algo_leave (Address: 0x0a8)

Bit(s)	Name	Description
8:8	`PRI_A_CONFIG_IO_ALGO_LEAVE_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_A_CONFIG_IO_ALGO_LEAVE_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_A_CONFIG_IO_ALGO_LEAVE_SET_INPUT`	Execute Set Input routine
5:5	`PRI_A_CONFIG_IO_ALGO_LEAVE_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_A_CONFIG_IO_ALGO_LEAVE_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_A_CONFIG_IO_ALGO_LEAVE_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_A_CONFIG_IO_ALGO_LEAVE_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_A_CONFIG_IO_ALGO_LEAVE_READ_I2C`	Execute Read I2C routine
0:0	`PRI_A_CONFIG_IO_ALGO_LEAVE_WRITE_I2C`	Execute Write I2C routine

Table 1.323. pri_b_output_format (Address: 0x007)

Bit(s)	Name	Description
9:9	`PRI_B_OF_MONO`	Monochrome but not special effect
8:8	`PRI_B_OF_PROCESSED_BAYER`	Processed Bayer with no by-pass
7:7	`BIT_7`
6:6	`PRI_B_OF_RAW10`	Bayer by-pass 10-bit
5:5	`PRI_B_OF_RAW8`	Bayer by-pass 8-bit
4:4	`PRI_B_OF_RGB444X`	RGB 444
3:3	`PRI_B_OF_RGB555X`	RGB 555
2:2	`PRI_B_OF_RGB565`	RGB 565
1:1	`BIT_1`
0:0	`PRI_B_OF_YUV422`	YCbCr

Table 1.324. pri_b_output_format_order (Address: 0x009)

Bit(s)	Name	Description
8:8	`PRI_B_OF_BAYER_FIRST_GB`	Processed bayer output first color Gb
7:7	`PRI_B_OF_BAYER_FIRST_B`	Processed bayer output first color B
6:6	`PRI_B_OF_BAYER_FIRST_R`	Processed bayer output first color R
5:5	`PRI_B_OF_BAYER_FIRST_GR`	Processed bayer output first color Gr
4:4	`PRI_B_OF_YUV_EVEN_ODD`	Select sampling mode for YUV422 even U odd V
3:3	`PRI_B_OF_YUV_ODD`	Select sampling mode for YUV422 odd UV
2:2	`PRI_B_OF_YUV_EVEN`	Select sampling mode for YUV422 even UV
1:1	`PRI_B_OF_SWAP_BYTE_ORDER`	1: Swap output pixel hi byte with low byte, 0: don't swap
0:0	`PRI_B_OF_SWAP_RED_BLUE`	1: Swap R/B or Cr/Cb channels, 0 don't swap R/B or Cr/Cb channels

Table 1.325. pri_b_config_fd_algo_enter (Address: 0x00f)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FD_ALGO_ENTER_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_B_CONFIG_FD_ALGO_ENTER_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.326. pri_b_config_fd_algo_run (Address: 0x011)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FD_ALGO_RUN_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_B_CONFIG_FD_ALGO_RUN_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.327. pri_b_config_fd_algo_leave (Address: 0x013)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FD_ALGO_LEAVE_SETPERIOD`	Execute DetectPeriod routine
0:0	`PRI_B_CONFIG_FD_ALGO_LEAVE_DETECTPERIOD`	Execute DetectPeriod routine

Table 1.328. pri_b_config_ae_rule_algo_enter (Address: 0x019)

Bit(s)	Name	Description
5:5	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_B_CONFIG_AE_RULE_ALGO_ENTER_SETUP_RULES`	Execute SetupDebugger routine

Table 1.329. pri_b_config_ae_rule_algo_run (Address: 0x01b)

Bit(s)	Name	Description
5:5	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_B_CONFIG_AE_RULE_ALGO_RUN_SETUP_RULES`	Execute SetupDebugger routine

Table 1.330. pri_b_config_ae_rule_algo_leave (Address: 0x01d)

Bit(s)	Name	Description
5:5	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_RULE_CENTER`	Evaluate Center Rule (DRT on center only)
4:4	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_RULE_ASI`	Evaluate ASI Rule
3:3	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_RULE_DRT`	Evaluate DRT Rule
2:2	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_RULE_AVGY`	Evaluate Average Brightness
1:1	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_DETECT_BACKLIGHT`	Execute Detect Backlight routine
0:0	`PRI_B_CONFIG_AE_RULE_ALGO_LEAVE_SETUP_RULES`	Execute SetupDebugger routine

Table 1.331. pri_b_config_ae_track_algo_enter (Address: 0x025)

Bit(s)	Name	Description
4:4	`PRI_B_CONFIG_AE_TRACK_ALGO_ENTER_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_B_CONFIG_AE_TRACK_ALGO_ENTER_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_B_CONFIG_AE_TRACK_ALGO_ENTER_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_B_CONFIG_AE_TRACK_ALGO_ENTER_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_B_CONFIG_AE_TRACK_ALGO_ENTER_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.332. pri_b_config_ae_track_algo_run (Address: 0x027)

Bit(s)	Name	Description
4:4	`PRI_B_CONFIG_AE_TRACK_ALGO_RUN_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_B_CONFIG_AE_TRACK_ALGO_RUN_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_B_CONFIG_AE_TRACK_ALGO_RUN_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_B_CONFIG_AE_TRACK_ALGO_RUN_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_B_CONFIG_AE_TRACK_ALGO_RUN_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.333. pri_b_config_ae_track_algo_leave (Address: 0x029)

Bit(s)	Name	Description
4:4	`PRI_B_CONFIG_AE_TRACK_ALGO_LEAVE_MODECHANGE_NO_FD`	Execute AE Mode Change without flicker
3:3	`PRI_B_CONFIG_AE_TRACK_ALGO_LEAVE_AE_MODECHANGE`	Execute AE Mode Change
2:2	`PRI_B_CONFIG_AE_TRACK_ALGO_LEAVE_CALC_BLACKLEVEL`	Execute Set Blacklevel routine
1:1	`PRI_B_CONFIG_AE_TRACK_ALGO_LEAVE_ADJUST_BRIGHTNESS`	Execute Adjust Brightness routine
0:0	`PRI_B_CONFIG_AE_TRACK_ALGO_LEAVE_SET_TARGET_AVGY`	Execute Set Target Average Y routine

Table 1.334. pri_b_config_awb_algo_enter (Address: 0x03d)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_AWB_ALGO_ENTER_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_B_CONFIG_AWB_ALGO_ENTER_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_B_CONFIG_AWB_ALGO_ENTER_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_B_CONFIG_AWB_ALGO_ENTER_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_B_CONFIG_AWB_ALGO_ENTER_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_B_CONFIG_AWB_ALGO_ENTER_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_B_CONFIG_AWB_ALGO_ENTER_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_B_CONFIG_AWB_ALGO_ENTER_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_B_CONFIG_AWB_ALGO_ENTER_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.335. pri_b_config_awb_algo_run (Address: 0x03f)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_AWB_ALGO_RUN_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_B_CONFIG_AWB_ALGO_RUN_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_B_CONFIG_AWB_ALGO_RUN_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_B_CONFIG_AWB_ALGO_RUN_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_B_CONFIG_AWB_ALGO_RUN_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_B_CONFIG_AWB_ALGO_RUN_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_B_CONFIG_AWB_ALGO_RUN_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_B_CONFIG_AWB_ALGO_RUN_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_B_CONFIG_AWB_ALGO_RUN_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.336. pri_b_config_awb_algo_leave (Address: 0x041)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_AWB_ALGO_LEAVE_CALC_RATIOS`	Calc pre and post AWB ratios from stats
7:7	`PRI_B_CONFIG_AWB_ALGO_LEAVE_SET_DGAIN_CCM`	Setup DGain and CCM for SYSCTRL
6:6	`PRI_B_CONFIG_AWB_ALGO_LEAVE_FINALIZE_DGAINS`	Execute Finalize DGain calculation
5:5	`PRI_B_CONFIG_AWB_ALGO_LEAVE_NORM_CCM_MATRIX`	Execute Normalize CCM Matrix routine
4:4	`PRI_B_CONFIG_AWB_ALGO_LEAVE_CALC_CCM_MATRIX`	Execute Calc CCM Matrix
3:3	`PRI_B_CONFIG_AWB_ALGO_LEAVE_CALC_CCM_POSITION`	Execute Calc CCM Matrix Position
2:2	`PRI_B_CONFIG_AWB_ALGO_LEAVE_SET_CCM_LL_MATRIX`	Execute Set CCM Lowlight Matrix routine
1:1	`PRI_B_CONFIG_AWB_ALGO_LEAVE_SETUP_CCM_LL_MATRIX`	Execute Setup CCM Lowlight Matrix routine
0:0	`PRI_B_CONFIG_AWB_ALGO_LEAVE_CALC_DGAINS`	Execute Calc Digital Gains routine

Table 1.337. pri_b_config_is_algo_enter (Address: 0x050)

Bit(s)	Name	Description
2:2	`PRI_B_CONFIG_IS_ALGO_ENTER_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_B_CONFIG_IS_ALGO_ENTER_LORISE`	Execute IS routine
0:0	`PRI_B_CONFIG_IS_ALGO_ENTER_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.338. pri_b_config_is_algo_run (Address: 0x052)

Bit(s)	Name	Description
2:2	`PRI_B_CONFIG_IS_ALGO_RUN_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_B_CONFIG_IS_ALGO_RUN_LORISE`	Execute IS routine
0:0	`PRI_B_CONFIG_IS_ALGO_RUN_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.339. pri_b_config_is_algo_leave (Address: 0x054)

Bit(s)	Name	Description
2:2	`PRI_B_CONFIG_IS_ALGO_LEAVE_RSTR_GAINS`	Execute Restore Gains routine
1:1	`PRI_B_CONFIG_IS_ALGO_LEAVE_LORISE`	Execute IS routine
0:0	`PRI_B_CONFIG_IS_ALGO_LEAVE_SETUP_PASS1`	Execute Pass1Setup routine

Table 1.340. pri_b_config_is_mode (Address: 0x8056)

Bit(s)	Name	Description
3:3	`PRI_B_CONFIG_IS_IS_BRIGHTNESS_SCALE`	Automatically Scale AS values based on Brightness Metric
2:2	`PRI_B_CONFIG_IS_IS_FLICKER_AWARE`
1:1	`PRI_B_CONFIG_IS_IS_PASS1_SHARP_ENABLE`
0:0	`PRI_B_CONFIG_IS_IS_DRIVER_ENABLE`

Table 1.341. pri_b_config_stat_algo_enter (Address: 0x05e)

Bit(s)	Name	Description
12:12	`PRI_B_CONFIG_STAT_ALGO_ENTER_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_B_CONFIG_STAT_ALGO_ENTER_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_B_CONFIG_STAT_ALGO_ENTER_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_B_CONFIG_STAT_ALGO_ENTER_GET_FD`	Execute Get_FD routine
8:8	`PRI_B_CONFIG_STAT_ALGO_ENTER_GET_AF`	Execute Get_AF routine
7:7	`PRI_B_CONFIG_STAT_ALGO_ENTER_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_B_CONFIG_STAT_ALGO_ENTER_GET_HG`	Execute Get_HG routine
5:5	`PRI_B_CONFIG_STAT_ALGO_ENTER_GET_AE`	Execute Get_AE routine
4:4	`PRI_B_CONFIG_STAT_ALGO_ENTER_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_B_CONFIG_STAT_ALGO_ENTER_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_B_CONFIG_STAT_ALGO_ENTER_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_B_CONFIG_STAT_ALGO_ENTER_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_B_CONFIG_STAT_ALGO_ENTER_SETUP_AE`	Execute Setup_AE routine

Table 1.342. pri_b_config_stat_algo_run (Address: 0x060)

Bit(s)	Name	Description
12:12	`PRI_B_CONFIG_STAT_ALGO_RUN_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_B_CONFIG_STAT_ALGO_RUN_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_B_CONFIG_STAT_ALGO_RUN_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_B_CONFIG_STAT_ALGO_RUN_GET_FD`	Execute Get_FD routine
8:8	`PRI_B_CONFIG_STAT_ALGO_RUN_GET_AF`	Execute Get_AF routine
7:7	`PRI_B_CONFIG_STAT_ALGO_RUN_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_B_CONFIG_STAT_ALGO_RUN_GET_HG`	Execute Get_HG routine
5:5	`PRI_B_CONFIG_STAT_ALGO_RUN_GET_AE`	Execute Get_AE routine
4:4	`PRI_B_CONFIG_STAT_ALGO_RUN_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_B_CONFIG_STAT_ALGO_RUN_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_B_CONFIG_STAT_ALGO_RUN_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_B_CONFIG_STAT_ALGO_RUN_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_B_CONFIG_STAT_ALGO_RUN_SETUP_AE`	Execute Setup_AE routine

Table 1.343. pri_b_config_stat_algo_leave (Address: 0x062)

Bit(s)	Name	Description
12:12	`PRI_B_CONFIG_STAT_ALGO_LEAVE_CALC_BM`	Execute the CalcBrightnessMetric routine
11:11	`PRI_B_CONFIG_STAT_ALGO_LEAVE_PROGRESS_FD`	Execute Progress_FD routine
10:10	`PRI_B_CONFIG_STAT_ALGO_LEAVE_PROGRESS_AE`	Execute Progress_AE routine
9:9	`PRI_B_CONFIG_STAT_ALGO_LEAVE_GET_FD`	Execute Get_FD routine
8:8	`PRI_B_CONFIG_STAT_ALGO_LEAVE_GET_AF`	Execute Get_AF routine
7:7	`PRI_B_CONFIG_STAT_ALGO_LEAVE_GET_AWB`	Execute Get_AWB routine
6:6	`PRI_B_CONFIG_STAT_ALGO_LEAVE_GET_HG`	Execute Get_HG routine
5:5	`PRI_B_CONFIG_STAT_ALGO_LEAVE_GET_AE`	Execute Get_AE routine
4:4	`PRI_B_CONFIG_STAT_ALGO_LEAVE_SETUP_FD`	Execute Setup_FD routine
3:3	`PRI_B_CONFIG_STAT_ALGO_LEAVE_SETUP_AF`	Execute Setup_AF routine
2:2	`PRI_B_CONFIG_STAT_ALGO_LEAVE_SETUP_AWB`	Execute Setup_AWB routine
1:1	`PRI_B_CONFIG_STAT_ALGO_LEAVE_SETUP_HG`	Execute Setup_HG routine
0:0	`PRI_B_CONFIG_STAT_ALGO_LEAVE_SETUP_AE`	Execute Setup_AE routine

Table 1.344. pri_b_config_ll_algo_enter (Address: 0x065)

Bit(s)	Name	Description
7:7	`PRI_B_CONFIG_LL_ALGO_ENTER_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_B_CONFIG_LL_ALGO_ENTER_SETNOISE`	Execute SetNoise routine
5:5	`PRI_B_CONFIG_LL_ALGO_ENTER_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_B_CONFIG_LL_ALGO_ENTER_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_B_CONFIG_LL_ALGO_ENTER_SETTONAL`	Execute SetTonal routine
2:2	`PRI_B_CONFIG_LL_ALGO_ENTER_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_B_CONFIG_LL_ALGO_ENTER_AUTOTC`	Execute AutoTC routine

Table 1.345. pri_b_config_ll_algo_run (Address: 0x067)

Bit(s)	Name	Description
7:7	`PRI_B_CONFIG_LL_ALGO_RUN_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_B_CONFIG_LL_ALGO_RUN_SETNOISE`	Execute SetNoise routine
5:5	`PRI_B_CONFIG_LL_ALGO_RUN_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_B_CONFIG_LL_ALGO_RUN_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_B_CONFIG_LL_ALGO_RUN_SETTONAL`	Execute SetTonal routine
2:2	`PRI_B_CONFIG_LL_ALGO_RUN_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_B_CONFIG_LL_ALGO_RUN_AUTOTC`	Execute AutoTC routine

Table 1.346. pri_b_config_ll_algo_leave (Address: 0x069)

Bit(s)	Name	Description
7:7	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETUPKERNEL`	Execute SetNoise routine
6:6	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETNOISE`	Execute SetNoise routine
5:5	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETSATURATION`	Execute SetInterpolation routine
4:4	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETKERNEL`	Execute SetAperture routine
3:3	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETTONAL`	Execute SetTonal routine
2:2	`PRI_B_CONFIG_LL_ALGO_LEAVE_SETGAMMA`	Execute SetGamma routine
1:1	`BIT_1`
0:0	`PRI_B_CONFIG_LL_ALGO_LEAVE_AUTOTC`	Execute AutoTC routine

Table 1.347. pri_b_config_flash_algo_enter (Address: 0x071)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FLASH_ALGO_ENTER_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_B_CONFIG_FLASH_ALGO_ENTER_SETMODE`	Execute SetPosition routine

Table 1.348. pri_b_config_flash_algo_run (Address: 0x073)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FLASH_ALGO_RUN_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_B_CONFIG_FLASH_ALGO_RUN_SETMODE`	Execute SetPosition routine

Table 1.349. pri_b_config_flash_algo_leave (Address: 0x075)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_FLASH_ALGO_LEAVE_RESTORECCM`	Execute Restore CCM routine
0:0	`PRI_B_CONFIG_FLASH_ALGO_LEAVE_SETMODE`	Execute SetPosition routine

Table 1.350. pri_b_config_sysctrl_algo_enter (Address: 0x07d)

Bit(s)	Name	Description
11:11	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_STANDBY`	Execute Standby routine
7:7	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_POWERUP`	Execute Powerup routine
6:6	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_FX`	Execute SetFX routine
5:5	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_CCM`	Execute SetCCM routine
2:2	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_B_CONFIG_SYSCTRL_ALGO_ENTER_SET_PLL`	Execute SetPLL routine

Table 1.351. pri_b_config_sysctrl_algo_run (Address: 0x07f)

Bit(s)	Name	Description
11:11	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_STANDBY`	Execute Standby routine
7:7	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_POWERUP`	Execute Powerup routine
6:6	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_FX`	Execute SetFX routine
5:5	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_CCM`	Execute SetCCM routine
2:2	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_B_CONFIG_SYSCTRL_ALGO_RUN_SET_PLL`	Execute SetPLL routine

Table 1.352. pri_b_config_sysctrl_algo_leave (Address: 0x081)

Bit(s)	Name	Description
11:11	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_WAITFRAME`	Execute WaitFrame routine
10:10	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_IRQ`	Execute SetIRQ routine
8:8	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_STANDBY`	Execute Standby routine
7:7	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_POWERUP`	Execute Powerup routine
6:6	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_FX`	Execute SetFX routine
5:5	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_SCALER`	Execute SetScaler routine
4:4	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_COLORKILL`	Execute SetColorkill routine
3:3	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_CCM`	Execute SetCCM routine
2:2	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_DIGITALGAIN`	Execute SetDigitalGain routine
1:1	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_BLACKLEVEL`	Execute SetBlackLevel routine
0:0	`PRI_B_CONFIG_SYSCTRL_ALGO_LEAVE_SET_PLL`	Execute SetPLL routine

Table 1.353. pri_b_config_jpeg_jp_mode (Address: 0x808e)

Bit(s)	Name	Description
1:1	`PRI_B_CONFIG_JPEG_TN_ENABLE`	Enable thumbnail
0:0	`PRI_B_CONFIG_JPEG_JP_ENABLE`	Enable JPEG

Table 1.354. pri_b_config_jpeg_config (Address: 0x090)

Bit(s)	Name	Description
15:15	`PRI_B_CONFIG_JPEG_JP_CFG_FRM_OVFLW_PROTECT`	Frame overflow protection, 1=on, 0=off
14:14	`PRI_B_CONFIG_JPEG_JP_CFG_TN_INSERT_HDR`	TN insert header
13:13	`PRI_B_CONFIG_JPEG_JP_CFG_IGNORE_HT`	spoof mode ignore height
12:12	`PRI_B_CONFIG_JPEG_JP_CFG_AQLE`	Limit amount of data from JPEG engine to ensure the image compression ratio is greater than JPOP_LIMIT
11:11	`PRI_B_CONFIG_JPEG_JP_CFG_EOF_HDR`	Q-table four byte header code and EOF marker
10:10	`PRI_B_CONFIG_JPEG_JP_CFG_EOF`	add EOF (0xff, 0xd9) marker only
6:6	`PRI_B_CONFIG_JPEG_JP_CFG_QTBL_PTR`	quantization table to be used for next frame
5:5	`PRI_B_CONFIG_JPEG_JP_CFG_QTBL_AUTOSEL`	enable auto-select quantization table after unsuccessful JPEG encoding (in conjunction with JPEG_CFG_QTBLPTR)
4:4	`PRI_B_CONFIG_JPEG_JP_CFG_QSCALE_ENABLE`	enable scaled quantization table generation (in conjunction with qscale1/2 variables)
2:2	`PRI_B_CONFIG_JPEG_JP_CFG_RETRY_ENABLE`	retry after an unsuccessful encode or transfer

Table 1.355. pri_b_config_jpeg_ob_tx_control_var (Address: 0x0a0)

Bit(s)	Name	Description
15:15	`PRI_B_CONFIG_JPEG_OB_ENABLE_RESOLUTION`	OB Enable JPEG/THUMBNAIL resolution
14:14	`PRI_B_CONFIG_JPEG_OB_ENABLE_MIPI_LINE_BYTE_CNT`	OB Enable MIPI line byte count
13:13	`PRI_B_CONFIG_JPEG_OB_ENABLE_INDEX_TABLE`	OB Enable Index Table
12:12	`PRI_B_CONFIG_JPEG_OB_EN_LEGALIZE_STATUS`	OB Enable Legalize Status
11:11	`PRI_B_CONFIG_JPEG_OB_EN_CLK_B2_LINES`	Output Buffer Enable PCLK Between Lines
10:10	`PRI_B_CONFIG_JPEG_OB_INSERT_CCIR_CODES`	Output Buffer Insert CCIR Codes Enable
9:9	`PRI_B_CONFIG_JPEG_OB_INSERT_JP_STATUS`	Output Buffer Insert JPEG Status Enable
8:8	`PRI_B_CONFIG_JPEG_OB_DUP_FV_ON_LV`	Output Buffer Duplicate FV on LV
7:7	`PRI_B_CONFIG_JPEG_OB_EN_BYTE_SWAP`	Output Buffer Enable Byte Swap
6:6	`PRI_B_CONFIG_JPEG_OB_EN_ADAPTIVE_CLK`	Output Buffer Enable Adaptive Clock
5:5	`PRI_B_CONFIG_JPEG_OB_SOI_EOI_IN_FV`	Output Buffer SOI/EOI within Frame Valid
4:4	`PRI_B_CONFIG_JPEG_OB_EN_SOI_EOI`	Output Buffer Enable SOI and EOI
3:3	`PRI_B_CONFIG_JPEG_OB_EN_CLK_INVALID_DATA`	Output Buffer Enable Clock for Invalid Data
2:2	`PRI_B_CONFIG_JPEG_OB_EN_CLK_B2_FRAMES`	Output Buffer Enable Clock Between Frames
0:1	`PRI_B_CONFIG_JPEG_OB_TX_MODE`	Output Buffer Transmit Mode

Table 1.356. pri_b_config_jpeg_ob_intf_config (Address: 0x0a2)

Bit(s)	Name	Description
3:3	`PRI_B_CONFIG_JPEG_OB_RX_INTF_HIGH`	Output Buffer RX Interface High
2:2	`PRI_B_CONFIG_JPEG_OB_TX_INTF`	Output Buffer TX Interface
0:1	`PRI_B_CONFIG_JPEG_OB_RX_INTF_LOW`	Output Buffer RX Interface Low

Table 1.357. pri_b_config_io_algo_enter (Address: 0x0a4)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_IO_ALGO_ENTER_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_B_CONFIG_IO_ALGO_ENTER_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_B_CONFIG_IO_ALGO_ENTER_SET_INPUT`	Execute Set Input routine
5:5	`PRI_B_CONFIG_IO_ALGO_ENTER_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_B_CONFIG_IO_ALGO_ENTER_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_B_CONFIG_IO_ALGO_ENTER_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_B_CONFIG_IO_ALGO_ENTER_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_B_CONFIG_IO_ALGO_ENTER_READ_I2C`	Execute Read I2C routine
0:0	`PRI_B_CONFIG_IO_ALGO_ENTER_WRITE_I2C`	Execute Write I2C routine

Table 1.358. pri_b_config_io_algo_run (Address: 0x0a6)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_IO_ALGO_RUN_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_B_CONFIG_IO_ALGO_RUN_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_B_CONFIG_IO_ALGO_RUN_SET_INPUT`	Execute Set Input routine
5:5	`PRI_B_CONFIG_IO_ALGO_RUN_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_B_CONFIG_IO_ALGO_RUN_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_B_CONFIG_IO_ALGO_RUN_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_B_CONFIG_IO_ALGO_RUN_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_B_CONFIG_IO_ALGO_RUN_READ_I2C`	Execute Read I2C routine
0:0	`PRI_B_CONFIG_IO_ALGO_RUN_WRITE_I2C`	Execute Write I2C routine

Table 1.359. pri_b_config_io_algo_leave (Address: 0x0a8)

Bit(s)	Name	Description
8:8	`PRI_B_CONFIG_IO_ALGO_LEAVE_SET_TESTPATTERN`	Execute Set Testpattern routine
7:7	`PRI_B_CONFIG_IO_ALGO_LEAVE_SET_OUTPUT`	Execute Set Output routine
6:6	`PRI_B_CONFIG_IO_ALGO_LEAVE_SET_INPUT`	Execute Set Input routine
5:5	`PRI_B_CONFIG_IO_ALGO_LEAVE_SET_FORMAT`	Execute Set Format routine
4:4	`PRI_B_CONFIG_IO_ALGO_LEAVE_SET_FIFO`	Execute Set Fifo routine
3:3	`PRI_B_CONFIG_IO_ALGO_LEAVE_SETDIVIDER`	Execute Ready I2C routine
2:2	`PRI_B_CONFIG_IO_ALGO_LEAVE_READY_I2C`	Execute Ready I2C routine
1:1	`PRI_B_CONFIG_IO_ALGO_LEAVE_READ_I2C`	Execute Read I2C routine
0:0	`PRI_B_CONFIG_IO_ALGO_LEAVE_WRITE_I2C`	Execute Write I2C routine